公开(公告)号：US20140208061A1

公开(公告)日：2014-07-24

申请号：US13962558

申请日：2013-08-08

Applicant: LSI CORPORATION

Inventor： Earl Cohen

IPC: G06F12/10

CPC classification number: G06F3/0608 ,  G06F3/064 ,  G06F3/0679 ,  G06F11/1068 ,  G06F12/0238 ,  G06F12/0246 ,  G06F12/04 ,  G06F2212/1044 ,  G06F2212/202 ,  G06F2212/214 ,  G06F2212/401 ,  G11C29/52

Abstract: Systems and methods presented herein provide for locating data in non-volatile memory by decoupling a mapping unit size from restrictions such as the maximum size of a reducible unit to provide efficient mapping of larger mapping units. In one embodiment, a method comprises mapping a logical page address in a logical block address space to a read unit address and a number of read units in the non-volatile memory. The method also comprises mapping data of the logical page address to a plurality of variable-sized pieces of data spread across the number of read units starting at the read unit address in the non-volatile memory.

Abstract translation: 本文提出的系统和方法通过将映射单元大小与诸如可缩减单元的最大大小的限制分离来提供较大映射单元的有效映射来提供将数据定位在非易失性存储器中。 在一个实施例中，一种方法包括将逻辑块地址空间中的逻辑页地址映射到非易失性存储器中的读单元地址和多个读单元。 该方法还包括将逻辑页面地址的数据映射到从非易失性存储器中的读取单元地址开始的多个读取单元上分散的多个可变大小的数据片段。

公开(公告)号：US20140201462A1

公开(公告)日：2014-07-17

申请号：US13739804

申请日：2013-01-11

Applicant: LSI CORPORATION

Inventor： Parag R. Maharana ,  Luca Bert ,  Earl Cohen

IPC: G06F12/08

CPC classification number: G06F12/0895 ,  G06F9/455 ,  G06F2009/45583 ,  H04L67/2852 ,  H04L67/34

Abstract: A method and system for managing a cache for a host machine is disclosed. The method includes: indicating each cache line in the cache as being in a transitional meta-state when any virtual machine hosted on the host machine moves out of the host machine; each time a particular cache line is accessed, indicating that particular cache line as no longer in the transitional meta-state; and marking the cache lines still in the transitional meta-state as invalid when a virtual machine moves back to the host machine.

Abstract translation: 公开了一种用于管理主机的高速缓存的方法和系统。 该方法包括：当主机上托管的任何虚拟机移出主机时，将缓存中的每个高速缓存行指示为处于过渡的元状态; 每次访问特定的高速缓存行时，指示特定高速缓存行不再处于过渡元状态; 并且当虚拟机移回主机时，将仍处于过渡元状态的高速缓存行标记为无效。

公开(公告)号：US09513982B1

公开(公告)日：2016-12-06

申请号：US14273719

申请日：2014-05-09

Applicant: LSI Corporation

Inventor： Yunxiang Wu ,  Ivana Djurdjevic ,  Yu Cai ,  Earl Cohen ,  Erich F. Haratsch

IPC: G11C29/00 ,  G06F11/07

CPC classification number: G06F11/073 ,  B29C64/153 ,  B33Y10/00 ,  B33Y30/00 ,  H05B6/101 ,  H05B6/40

Abstract: An electronic non-volatile computer storage apparatus and methods for reducing decoder error floor for such a storage apparatus are disclosed. An analysis process it utilized to study one or more performance metrics of a decoder of the storage apparatus in order to determine various endurance points throughout the lifetime of that particular type of storage apparatus. Theses endurance points indicate when different scaling factors should be applied and/or when log-likelihood ratio should be re-measured to accommodate physical degradations over time.

Abstract translation: 公开了一种电子非易失性计算机存储装置和用于减少这种存储装置的解码器错误的方法。 其用于研究存储装置的解码器的一个或多个性能度量的分析过程，以便确定该特定类型的存储装置的整个寿命期内的各种耐久点。 这些耐力点表明应该应用不同的比例因子和/或当应该重新测量对数似然比以适应随时间的物理退化时。

公开(公告)号：US20150236726A1

公开(公告)日：2015-08-20

申请号：US14218626

申请日：2014-03-18

Applicant: LSI Corporation

Inventor： Sundararajan Sankaranarayanan ,  AbdelHakim S. Alhussien ,  Erich F. Haratsch ,  Earl Cohen

IPC: H03M13/45 ,  H03M13/37

CPC classification number: H03M13/1111 ,  H03M13/1142 ,  H03M13/3723

Abstract: A data processing system includes a likelihood input operable to receive encoded data, a decoder operable to apply a decoding algorithm to likelihood values for the received encoded data and to yield a decoded output, and a decoder input initialization circuit operable to generate new decoder input values based in part on the likelihood values for the received encoded data after the likelihood values for the received encoded data have failed to converge in the decoder.

Abstract translation: 数据处理系统包括可操作以接收编码数据的可能性输入，可操作以将解码算法应用于接收的编码数据的似然值并产生解码输出的解码器，以及可操作以产生新的解码器输入值的解码器输入初始化电路 部分地基于在接收的编码数据的似然值未能在解码器中收敛之后接收的编码数据的似然值。

公开(公告)号：US08984234B2

公开(公告)日：2015-03-17

申请号：US13739804

申请日：2013-01-11

Applicant: LSI Corporation

Inventor： Parag R. Maharana ,  Luca Bert ,  Earl Cohen

IPC: G06F12/08 ,  G06F9/455

CPC classification number: G06F12/0895 ,  G06F9/455 ,  G06F2009/45583 ,  H04L67/2852 ,  H04L67/34

Abstract: A method and system for managing a cache for a host machine is disclosed. The method includes: indicating each cache line in the cache as being in a transitional meta-state when any virtual machine hosted on the host machine moves out of the host machine; each time a particular cache line is accessed, indicating that particular cache line as no longer in the transitional meta-state; and marking the cache lines still in the transitional meta-state as invalid when a virtual machine moves back to the host machine.

Abstract translation: 公开了一种用于管理主机的高速缓存的方法和系统。 该方法包括：当主机上托管的任何虚拟机移出主机时，将缓存中的每个高速缓存行指示为处于过渡的元状态; 每次访问特定的高速缓存行时，指示特定高速缓存行不再处于过渡元状态; 并且当虚拟机移回到主机时，将仍处于过渡元状态的高速缓存行标记为无效。

公开(公告)号：US09195594B2

公开(公告)日：2015-11-24

申请号：US13962558

申请日：2013-08-08

Applicant: LSI CORPORATION

Inventor： Earl Cohen

IPC: G06F12/00 ,  G06F12/04 ,  G06F12/02

CPC classification number: G06F3/0608 ,  G06F3/064 ,  G06F3/0679 ,  G06F11/1068 ,  G06F12/0238 ,  G06F12/0246 ,  G06F12/04 ,  G06F2212/1044 ,  G06F2212/202 ,  G06F2212/214 ,  G06F2212/401 ,  G11C29/52

Abstract: Systems and methods presented herein provide for locating data in non-volatile memory by decoupling a mapping unit size from restrictions such as the maximum size of a reducible unit to provide efficient mapping of larger mapping units. In one embodiment, a method comprises mapping a logical page address in a logical block address space to a read unit address and a number of read units in the non-volatile memory. The method also comprises mapping data of the logical page address to a plurality of variable-sized pieces of data spread across the number of read units starting at the read unit address in the non-volatile memory.

Abstract translation: 本文提出的系统和方法通过将映射单元大小与诸如可缩减单元的最大大小的限制分离来提供较大映射单元的有效映射来提供将数据定位在非易失性存储器中。 在一个实施例中，一种方法包括将逻辑块地址空间中的逻辑页地址映射到非易失性存储器中的读单元地址和多个读单元。 该方法还包括将逻辑页面地址的数据映射到从非易失性存储器中的读取单元地址开始的多个读取单元上分散的多个可变大小的数据片段。

公开(公告)号：US20140281155A1

公开(公告)日：2014-09-18

申请号：US13939345

申请日：2013-07-11

Applicant: LSI CORPORATION

Inventor： Earl Cohen

IPC: G06F3/06

CPC classification number: G06F3/0679 ,  G06F3/0608 ,  G06F3/0619 ,  G06F3/0641 ,  G06F3/0688

Abstract: Systems and methods presented herein provide for de-duplication of data. In one embodiment, an input/output module is operable to generate an input/output operation to write data. A storage device is communicatively coupled to the input/output module and operable to write the data of the input/output operation at a logical address of the storage device, and to generate a signature based on the data. The input/output module is further operable to process the signature to determine whether the data exists at another logical address.

Abstract translation: 本文中提供的系统和方法提供了重复数据删除数据。 在一个实施例中，输入/输出模块可操作以产生写入数据的输入/输出操作。 存储设备通信地耦合到输入/输出模块并且可操作以将输入/输出操作的数据写入存储设备的逻辑地址，并且基于该数据生成签名。 输入/输出模块还可操作以处理签名以确定数据是否存在于另一逻辑地址。