NANOSTRUCTURED MEMORY DEVICE
    1.
    发明申请
    NANOSTRUCTURED MEMORY DEVICE 失效
    纳米结构的存储器件

    公开(公告)号:US20110140086A1

    公开(公告)日:2011-06-16

    申请号:US13003046

    申请日:2009-07-02

    IPC分类号: H01L29/775 B82Y99/00

    摘要: The present invention provides a nanostructured memory device comprising at least one semiconductor nanowire (3) forming a current transport channel, one or more shell layers (4) arranged around at least a portion of the nanowire (3), and nano-sized charge trapping centres (10) embedded in said one or more shell layers (4), and one or more gate electrodes (14) arranged around at least a respective portion of said one or more shell layers (4). Preferably said one or more shell layers (4) are made of a wide band gap material or an insulator. The charge trapping centres (10) may be charged/written by using said one or more gate electrodes (14) and a change in an amount of charge stored in one or more of the charge trapping centres (10) alters the conductivity of the nanowire (3).

    摘要翻译: 本发明提供一种纳米结构存储器件,其包括形成电流传输沟道的至少一个半导体纳米线(3),围绕至少一部分纳米线(3)布置的一个或多个壳层(4)和纳米尺寸的电荷俘获 嵌入在所述一个或多个壳层(4)中的中心(10)以及围绕至少所述一个或多个壳层(4)的相应部分布置的一个或多个栅电极(14)。 优选地,所述一个或多个壳层(4)由宽带隙材料或绝缘体制成。 可以通过使用所述一个或多个栅电极(14)对电荷捕获中心(10)进行充电/写入,并且存储在一个或多个电荷捕获中心(10)中的电荷量的变化改变了纳米线的导电性 (3)。

    Nanostructured memory device
    2.
    发明授权
    Nanostructured memory device 失效
    纳米结构存储器件

    公开(公告)号:US08212237B2

    公开(公告)日:2012-07-03

    申请号:US13003046

    申请日:2009-07-02

    IPC分类号: H01L31/00

    摘要: The present invention provides a nanostructured memory device comprising at least one semiconductor nanowire (3) forming a current transport channel, one or more shell layers (4) arranged around at least a portion of the nanowire (3), and nano-sized charge trapping centers (10) embedded in said one or more shell layers (4), and one or more gate electrodes (14) arranged around at least a respective portion of said one or more shell layers (4). Preferably said one or more shell layers (4) are made of a wide band gap material or an insulator. The charge trapping centers (10) may be charged/written by using said one or more gate electrodes (14) and a change in an amount of charge stored in one or more of the charge trapping centers (10) alters the conductivity of the nanowire (3).

    摘要翻译: 本发明提供一种纳米结构存储器件,其包括形成电流传输沟道的至少一个半导体纳米线(3),围绕至少一部分纳米线(3)布置的一个或多个壳层(4)和纳米尺寸的电荷俘获 嵌入在所述一个或多个壳层(4)中的中心(10)以及围绕至少所述一个或多个壳层(4)的相应部分布置的一个或多个栅电极(14)。 优选地,所述一个或多个壳层(4)由宽带隙材料或绝缘体制成。 可以通过使用所述一个或多个栅电极(14)对电荷捕获中心(10)进行充电/写入,并且存储在一个或多个电荷捕获中心(10)中的电荷量的变化改变了纳米线的导电性 (3)。