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33 条记录 (耗时 0.022 秒)

    Column redundancy in semiconductor memories
    1.
    发明授权
    Column redundancy in semiconductor memories 失效
    半导体存储器中的列冗余

    公开(公告)号：US5959903A

    公开(公告)日：1999-09-28

    申请号：US904153

    申请日：1997-07-31

    申请人： Lidong Chen ,  Arun Achyuthan ,  John Wu

    发明人： Lidong Chen ,  Arun Achyuthan ,  John Wu

    IPC分类号： G11C11/408 ,  G11C29/00 ,  G11C7/00

    CPC分类号： G11C29/846 ,  G11C11/408 ,  G11C11/4087

    摘要： This invention describes a column redundancy method and apparatus in a DRAM that minimizes the timing difference between a normal and redundant column paths and which minimizes the number of fuses required in repairing faulty columns. The invention discloses a DRAM having memory elements arranged in rows and columns, the memory elements being accessible by decoding a memory address applied thereto, normal column drivers for energizing appropriate memory columns in response to the decoder memory addresses received at an input thereof; redundant column drivers; and switch means for steering the decoded memory address onto one of either normal or redundant column driver paths. The invention further illustrates a fusing system which minimizes the capacitance of redundant select lines, thereby removing unnecessary delay in the redundant column path.

    摘要翻译： 本发明描述了DRAM中的列冗余方法和装置，其使正常和冗余列路径之间的定时差最小化，并且使修复故障列所需的保险丝数量最小化。 本发明公开了一种具有以行和列排列的存储器元件的DRAM，存储器元件可通过解码施加到其上的存储器地址来访问，正常列驱动器响应于在其输入处接收的解码器存储器地址来激励适当的存储器列; 冗余列驱动程序; 以及用于将解码的存储器地址转向正常或冗余列驱动器路径之一的开关装置。 本发明进一步示出了使冗余选择线的电容最小化的融合系统，从而消除冗余列路径中的不必要的延迟。

    Precharge-enable self boosting word line driver for an embedded DRAM
    2.
    发明授权
    Precharge-enable self boosting word line driver for an embedded DRAM 失效
    嵌入式DRAM的预充电自升压字线驱动器

    公开(公告)号：US5923596A

    公开(公告)日：1999-07-13

    申请号：US74413

    申请日：1998-05-08

    申请人： John Wu ,  Lidong Chen ,  Peter B. Gillingham

    发明人： John Wu ,  Lidong Chen ,  Peter B. Gillingham

    IPC分类号： G11C7/00 ,  G11C8/08 ,  G11C11/408

    CPC分类号： G11C8/08 ,  G11C11/4085

    摘要： A method of driving a DRAM word line comprising initiating a word line active cycle from a leading edge of a row enable signal, applying a first voltage to a word line following and as a result of said leading edge, receiving a trailing edge of the enable signal and applying a boosted voltage to the word line following and as a result of the trailing edge.

    摘要翻译： 一种驱动DRAM字线的方法，包括从行允许信号的前沿开始字线有效周期，向第一电压施加第一电压，并作为所述前沿的结果，接收所述使能的后沿 信号，并且将下一个后跟并作为后沿的结果，对该字线施加升高的电压。

    Column redundancy in semiconductor memories
    3.
    发明授权
    Column redundancy in semiconductor memories 有权
    半导体存储器中的列冗余

    公开(公告)号：US6141268A

    公开(公告)日：2000-10-31

    申请号：US348314

    申请日：1999-07-07

    申请人： Lidong Chen ,  Arun Achynthan ,  John Wu

    发明人： Lidong Chen ,  Arun Achynthan ,  John Wu

    IPC分类号： G11C11/408 ,  G11C29/00 ,  G11C7/00

    CPC分类号： G11C29/846 ,  G11C11/408 ,  G11C11/4087

    摘要： This invention describes a column redundancy arrangement in a DRAM that minimizes the timing difference between a normal and a redundant column path. A semiconductor memory device comprises memory elements arranged in rows and columns. The memory elements are accessed by energizing one or more rows and columns. A first and a second group of normal column drivers are provided for energizing associated normal memory columns in response to respective ones of column select signals. Further, a first and second redundant column driver are provided for energizing associated redundant memory columns upon receipt of a column select signal along a redundancy select line. A plurality of programmable switches are associated with the normal column drivers, for selectively steering respective ones of the column select signals to associated column drivers or the first or second of the redundant column drivers.

    摘要翻译： 本发明描述了DRAM中的列冗余布置，其使正常和冗余列路径之间的定时差最小化。 半导体存储器件包括以行和列排列的存储元件。 通过激励一个或多个行和列来访问存储器元件。 提供第一组和第二组正常列驱动器，用于响应于列选择信号中的相应的一个列选择信号来激励相关的正常存储器列。 此外，第一和第二冗余列驱动器被提供用于在沿着冗余选择线接收列选择信号时激励相关联的冗余存储器列。 多个可编程开关与正常列驱动器相关联，用于将列选择信号中的相应列选择性地转向相关联的列驱动器或第一或第二冗余列驱动器。

    Precharge-enable self boosting word line driver for an embedded DRAM
    4.
    发明授权
    Precharge-enable self boosting word line driver for an embedded DRAM 有权
    嵌入式DRAM的预充电自升压字线驱动器

    公开(公告)号：US06058050A

    公开(公告)日：2000-05-02

    申请号：US291019

    申请日：1999-04-14

    申请人： John Wu ,  Lidong Chen ,  Peter B. Gillingham

    发明人： John Wu ,  Lidong Chen ,  Peter B. Gillingham

    IPC分类号： G11C7/00 ,  G11C8/08 ,  G11C11/408

    CPC分类号： G11C8/08 ,  G11C11/4085

    摘要： The invention relates to word line drivers found in embedded dynamic random access memories (DRAM) of application specific integrated circuits (ASICs). The invention is a method of programming the time at which the boosted voltage interval begins, and the period during which the boosted voltage is maintained. The result is the ability to apply the boosted voltage only when needed, thus minimizing the danger to the oxide integrity. The method comprises initiating an active row cycle in response to a leading edge of a row activation signal, initiating a precharge cycle in response to a trailing edge of the row activation signal, the precharge cycle comprising a broad line boost interval initiated by the falling edge of the row activation signal and having a predetermined duration controlled by a programmable delay circuit.

    摘要翻译： 本发明涉及在专用集成电路（ASIC）的嵌入式动态随机存取存储器（DRAM）中发现的字线驱动器。 本发明是一种编程升压电压间隔开始的时间和保持升压电压的时间的方法。 结果是仅在需要时施加升压电压的能力，从而最小化对氧化物完整性的危害。 该方法包括响应于行激活信号的前沿响应于行激活信号的后沿启动预充电周期，该预充电周期包括由下降沿引发的宽线升压间隔 并具有由可编程延迟电路控制的预定持续时间。

    Application authentication in wireless communication networks
    7.
    发明申请
    Application authentication in wireless communication networks 审中-公开
    无线通信网络中的应用认证

    公开(公告)号：US20050238171A1

    公开(公告)日：2005-10-27

    申请号：US10831808

    申请日：2004-04-26

    申请人： Lidong Chen ,  Balakumar Jagadesan

    发明人： Lidong Chen ,  Balakumar Jagadesan

    IPC分类号： H04L29/06 ,  H04W12/06 ,  H04L9/00

    CPC分类号： H04W12/06 ,  H04L63/0428 ,  H04L63/08 ,  H04W12/04 ,  H04W76/45

    摘要： A method in wireless communications devices including generating a lower layer cipher key from a lower layer access key stored on the wireless communications device, for example, on a smart card, and then generating a higher layer authentication key (210) from the lower layer cipher key (230). The higher layer authentication key is also generated at a network entity and delivered to an authentication and authorization server. An application server authenticates subscriber device service requests with the authentication and authorization server using the higher layer authentication key.

    摘要翻译： 一种无线通信设备中的方法，包括从存储在无线通信设备上的下层访问密钥（例如，智能卡）生成下层密码密钥，然后从下层密码生成较高层验证密钥（210） 键（230）。 较高层认证密钥也在网络实体生成并传递给认证和授权服务器。 应用服务器使用较高层验证密钥对认证授权服务器认证用户设备服务请求。

    Switch level simulation with cross-coupled devices
    8.
    发明授权
    Switch level simulation with cross-coupled devices 有权
    交叉耦合器件开关级仿真

    公开(公告)号：US06408264B1

    公开(公告)日：2002-06-18

    申请号：US09274211

    申请日：1999-03-23

    申请人： Jason Tzu-Jung Su ,  Howard C. Kirsch ,  Lidong Chen

    发明人： Jason Tzu-Jung Su ,  Howard C. Kirsch ,  Lidong Chen

    IPC分类号： G06F1750

    CPC分类号： G06F17/5022

    摘要： A switch level simulation system includes a netlister, a cross-coupled device detector, a cross-coupled device transformer and a switch level simulator. The user provides a circuit a design to the netlister, which generates a netlist of the circuit. The cross-coupled device detector searches the netlist to find all of the cross-coupled devices in the circuit design. The cross-coupled device detector also determines whether the cross-coupled device has a “rail” node directly connected an external voltage source line. The cross-coupled device transformer transforms each cross-coupled device having a rail node into a transformed cross-coupled device by inserting in the netlist a device at the rail node mirroring the enable device. The mirror device allows the transformed cross-coupled device to provide a high impedance state to emulate the meta-stable state of the cross-coupled device during switch level simulation. The switch level simulator then performs simulations using the netlist with the transformed cross-coupled devices. This technique avoids the need to construct behavioral models of the cross-coupled devices, significantly reducing the engineering resources needed to model cross-coupled devices, while maintaining the accuracy of the switch level simulation.

    摘要翻译： 开关级仿真系统包括网络管理器，交叉耦合器件检测器，交叉耦合器件变压器和开关级仿真器。 用户向netlister提供电路设计，其产生电路的网表。 交叉耦合器件检测器搜索网表以查找电路设计中的所有交叉耦合器件。 交叉耦合器件检测器还确定交叉耦合器件是否具有直接连接外部电压源线的“导轨”节点。 交叉耦合器件变压器将具有轨道节点的每个交叉耦合器件变换成变换的交叉耦合器件，通过在网络表中插入镜像启用器件的轨道节点上的器件。 反射镜装置允许变换的交叉耦合器件提供高阻抗状态以在开关级仿真期间模拟交叉耦合器件的元稳定状态。 开关级仿真器然后使用具有变换的交叉耦合器件的网表进行仿真。 该技术避免了构建交叉耦合器件的行为模型，大大降低了交叉耦合器件建模所需的工程资源，同时保持了开关级仿真的准确性。

    Thermoelectric device, electrode materials and method for fabricating thereof
    9.
    发明授权
    Thermoelectric device, electrode materials and method for fabricating thereof 有权
    热电装置，电极材料及其制造方法

    公开(公告)号：US09012760B2

    公开(公告)日：2015-04-21

    申请号：US13257521

    申请日：2010-03-25

    申请人： Lidong Chen ,  Monika Backhaus-Ricoult ,  Lin He ,  Xiaoya Li ,  Yunshan Tang ,  Xugui Xia ,  Degang Zhao

    发明人： Lidong Chen ,  Monika Backhaus-Ricoult ,  Lin He ,  Xiaoya Li ,  Yunshan Tang ,  Xugui Xia ,  Degang Zhao

    IPC分类号： H01L35/16 ,  H01L35/34 ,  H01L35/08

    CPC分类号： H01L35/34 ,  H01L35/08

    摘要： A thermoelectric device, a method for fabricating a thermoelectric device and electrode materials applied to the thermoelectric device are provided according to the present invention. The present invention is characterized in arranging thermoelectric material power, interlayer materials and electrode materials in advance according to the structure of thermoelectric device; adopting one-step sintering method to make a process of forming bulked thermoelectric materials and a process of combining with electrodes on the devices to be completed simultaneously; and obtaining a π shape thermoelectric device finally. Electrode materials related to the present invention comprise binary or ternary alloys or composite materials, which comprise at least a first metal selected from Cu, Ag, Al or Au, and a second metal selected from Mo, W, Zr, Ta, Cr, Nb, V or Ti. The present invention simplifies fabricating procedures, reduces the cost and avoids adverse impacts due to exposing related elements to heat and pressure for a second time.

    摘要翻译： 根据本发明，提供了一种热电装置，制造热电装置的方法和应用于热电装置的电极材料。 本发明的特征在于根据热电装置的结构预先设置热电材料功率，层间材料和电极材料; 采用一步烧结方法制作堆积热电材料的工艺和与要同时完成的器件上的电极组合的工艺; 并获得＆pgr 形热电装置。 与本发明相关的电极材料包括二元或三元合金或复合材料，其包含至少一种选自Cu，Ag，Al或Au的第一金属和选自Mo，W，Zr，Ta，Cr，Nb ，V或Ti。 本发明简化了制造过程，降低了成本，并且避免了由于第二次将相关元件暴露于热和压力而引起的不利影响。