公开(公告)号：US20110241187A1

公开(公告)日：2011-10-06

申请号：US13018438

申请日：2011-02-01

申请人： Liping Guo ,  Qingchun He ,  Zhaojun Tian ,  Jie Yang

发明人： Liping Guo ,  Qingchun He ,  Zhaojun Tian ,  Jie Yang

IPC分类号： H01L23/495 ,  H01L21/48

CPC分类号： H01L23/3107 ,  H01L23/49503 ,  H01L23/49541 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L2224/27013 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/181 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A lead frame having a recessed die bond area. The lead frame has top and bottom surfaces and a first lead frame thickness defined as the distance between the top and bottom surfaces. The lead frame has a die bond area surface located within a reduced die bond area. A second thickness is defined as the distance between the die bond area surface and the bottom surface. The second lead frame thickness is less than the first lead frame thickness such that a semiconductor die disposed and attached to the die bond area surface has a reduced overall package thickness. A side wall formed between the die bond area surface and the top surface contains the adhesive material used to attach the die, which reduces adhesive bleeding and prevents wire bonding contamination.

摘要翻译： 引线框架，具有凹陷的焊盘区域。 引线框架具有顶部和底部表面以及被定义为顶部和底部表面之间的距离的第一引线框架厚度。 引线框架具有位于减小的管芯接合区域内的管芯接合区域表面。 第二厚度被定义为管芯接合区域表面和底部表面之间的距离。 第二引线框架厚度小于第一引线框架厚度，使得设置并附接到管芯接合区域表面的半导体管芯具有减小的整体封装厚度。 形成在芯片接合区域表面和顶表面之间的侧壁包含用于附接模具的粘合材料，这降低了粘合剂渗出并防止引线接合污染。

公开(公告)号：US20110193207A1

公开(公告)日：2011-08-11

申请号：US13004031

申请日：2011-01-11

申请人： Zhaojun Tian ,  Qingchun He ,  Qiang Liu ,  Jie Yang ,  Shufeng Zhao

发明人： Zhaojun Tian ,  Qingchun He ,  Qiang Liu ,  Jie Yang ,  Shufeng Zhao

IPC分类号： H01L23/495

CPC分类号： H01L23/49541 ,  H01L23/3107 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/05599

摘要： A lead frame for providing electrical interconnection to a semiconductor die has a generally rectangular flag area having first and second major surfaces and four sides. The flag area is sized and shaped to receive a semiconductor die on one of the first and second major surfaces. A first row of leads is located adjacent to a first one of the four sides of the flag area and a second row of leads is located adjacent to a second one of the four sides of the flag area, where the second one of the four sides is adjacent to the first one of the four sides. The remaining two sides do not have any adjacent leads.

摘要翻译： 用于向半导体管芯提供电互连的引线框架具有大致矩形的标记区域，其具有第一和第二主表面和四个侧面。 标记区域的尺寸和形状被设计成在第一和第二主表面之一上接收半导体管芯。 第一排引线位于与标志区域的四个边中的第一个相邻的位置，并且第二排引线位于邻近标志区域的四个边的第二侧的位置，其中四个侧面中的第二个 毗邻四面的第一个。 剩下的两边没有任何相邻的导线。

公开(公告)号：US20120112333A1

公开(公告)日：2012-05-10

申请号：US13210393

申请日：2011-08-16

申请人： Qiang Liu ,  Qingchun He ,  Zhaojun Tian

发明人： Qiang Liu ,  Qingchun He ,  Zhaojun Tian

IPC分类号： H01L23/495 ,  H01L21/78 ,  H01L21/50

CPC分类号： H01L21/6835 ,  H01L21/4828 ,  H01L21/4842 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/49541 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/97 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/48479 ,  H01L2224/4945 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2224/48471 ,  H01L2924/00012 ,  H01L2224/4554

摘要： A molded surface mount semiconductor device has electrical contact elements disposed in a set of pairs of zigzag rows extending adjacent and generally parallel to opposite edges of an active face of a semiconductor die. Each of the pairs of rows includes an inner zigzag row of electrical contact elements nested inside an outer zigzag row of electrical contact elements. The electrical contact elements of the inner and outer zigzag rows are partially inter-digitated. A lead frame used in making the device also has a die pad located inside the set of pairs of zigzag rows, and an outer frame element located outside the set of pairs of zigzag rows, and which support the electrical contact elements of the inner and outer zigzag rows respectively.

摘要翻译： 模制的表面安装半导体器件具有设置在一组相对于半导体管芯的有源面的相邻并且大致平行的相对边缘延伸的一组锯齿形行中的电接触元件。 每对成对的行包括嵌套在外部之字形行的电接触元件内的内部之字形的电接触元件行。 内部和外部之字形行的电接触元件被部分地进行数字化。 用于制造该装置的引线框架还具有位于成对的之字形行内的管芯焊盘，以及位于一组成对的之字形行之外的外部框架元件，并且其支撑内部和外部的电接触元件 之字形行。