公开(公告)号：US10424593B2

公开(公告)日：2019-09-24

申请号：US15866132

申请日：2018-01-09

申请人： MACRONIX International Co., Ltd.

发明人： I-Ting Lin ,  Yuan-Chieh Chiu ,  Hong-Ji Lee

IPC分类号： H01L27/11578 ,  G11C14/00 ,  G11C16/04 ,  H01L21/28 ,  H01L27/1157 ,  G11C16/34 ,  G11C11/56

摘要： A three-dimensional non-volatile memory and a method of manufacturing the same are provided. The three-dimensional non-volatile memory includes a substrate, a charge storage structure, a stacked structure and a channel layer. The charge storage structure is disposed on the substrate. The stacked structure is disposed at a side of the charge storage structure and includes insulating layers, gates, a buffer layer and a barrier layer. The insulating layers and the gates are alternately stacked. The buffer layer is disposed between each of the gates and the charge storage structure and on the surfaces of the insulating layers. The barrier layer is disposed between each of the gates and the buffer layer. An end of the gate is convex with respect to an end of the barrier layer in a direction away from the channel layer.

公开(公告)号：US20190214402A1

公开(公告)日：2019-07-11

申请号：US15866132

申请日：2018-01-09

申请人： MACRONIX International Co., Ltd.

发明人： I-Ting Lin ,  Yuan-Chieh Chiu ,  Hong-Ji Lee

IPC分类号： H01L27/11578 ,  H01L27/1157 ,  H01L21/28 ,  G11C11/56 ,  G11C16/04 ,  G11C14/00 ,  G11C16/34

CPC分类号： H01L27/11578 ,  G11C11/5671 ,  G11C14/0018 ,  G11C16/0466 ,  G11C16/3422 ,  H01L27/1157 ,  H01L29/40117

摘要： A three-dimensional non-volatile memory and a method of manufacturing the same are provided. The three-dimensional non-volatile memory includes a substrate, a charge storage structure, a stacked structure and a channel layer. The charge storage structure is disposed on the substrate. The stacked structure is disposed at a side of the charge storage structure and includes insulating layers, gates, a buffer layer and a barrier layer. The insulating layers and the gates are alternately stacked. The buffer layer is disposed between each of the gates and the charge storage structure and on the surfaces of the insulating layers. The barrier layer is disposed between each of the gates and the buffer layer. An end of the gate is convex with respect to an end of the barrier layer in a direction away from the channel layer.

公开(公告)号：US10050051B1

公开(公告)日：2018-08-14

申请号：US15465770

申请日：2017-03-22

申请人： MACRONIX INTERNATIONAL CO., LTD.

发明人： Ting-Feng Liao ,  I-Ting Lin

IPC分类号： H01L29/49 ,  H01L27/11568

摘要： A memory device includes memory includes a multi-layers stack includes a plurality of insulating layers and a plurality conductive layers alternatively stacked on a semiconductor device, a plurality of memory cells formed on the conductive layers, a contact plug passing through the insulating layers and the conductive layers, and a dielectric layer including a plurality of extending parts each of which is inserted between each adjacent two ones of the insulating layers to isolate the conductive layer from the contact plug, wherein any one of the extending parts that has a shorter distance departed from the semiconductor substrate has a size substantially greater than a size of the others that has a longer distance departed from the semiconductor substrate.