公开(公告)号：US11145947B2

公开(公告)日：2021-10-12

申请号：US16711116

申请日：2019-12-11

Applicant: Microfabrica Inc.

Inventor： Elliott R. Brown ,  John D. Evans ,  Christopher A. Bang ,  Adam L. Cohen ,  Michael S. Lockard ,  Dennis R. Smalley ,  Morton Grosser

IPC: H01P3/06 ,  C25D1/00 ,  C25D5/02 ,  C25D5/10

Abstract: RF and microwave radiation directing or controlling components are provided that may be monolithic, that may be formed from a plurality of electrodeposition operations and/or from a plurality of deposited layers of material, that may include switches, inductors, antennae, transmission lines, filters, hybrid couplers, antenna arrays and/or other active or passive components. Components may include non-radiation-entry and non-radiation-exit channels that are useful in separating sacrificial materials from structural materials. Preferred formation processes use electrochemical fabrication techniques (e.g. including selective depositions, bulk depositions, etching operations and planarization operations) and post-deposition processes (e.g. selective etching operations and/or back filling operations).

公开(公告)号：US20190221911A1

公开(公告)日：2019-07-18

申请号：US16167217

申请日：2018-10-22

Applicant: Microfabrica Inc.

Inventor： Elliott R. Brown ,  John D. Evans ,  Christopher A. Bang ,  Adam L. Cohen ,  Michael S. Lockard ,  Dennis R. Smalley ,  Morton Grosser

IPC: H01P3/06 ,  C25D5/10 ,  C25D1/00 ,  C25D5/02

CPC classification number: H01P3/06 ,  C25D1/003 ,  C25D5/022 ,  C25D5/10

Abstract: RF and microwave radiation directing or controlling components are provided that may be monolithic, that may be formed from a plurality of electrodeposition operations and/or from a plurality of deposited layers of material, that may include switches, inductors, antennae, transmission lines, filters, hybrid couplers, antenna arrays and/or other active or passive components. Components may include non-radiation-entry and non-radiation-exit channels that are useful in separating sacrificial materials from structural materials. Preferred formation processes use electrochemical fabrication techniques (e.g. including selective depositions, bulk depositions, etching operations and planarization operations) and post-deposition processes (e.g. selective etching operations and/or back filling operations).

公开(公告)号：US20190218680A1

公开(公告)日：2019-07-18

申请号：US16182989

申请日：2018-11-07

Applicant: Microfabrica Inc.

Inventor： Gregory P. Schmitz ,  Michael S. Lockard ,  Ming-Ting Wu ,  Eric C. Miller ,  Adam L. Cohen

IPC: C25D1/00 ,  C25D5/02 ,  C25D5/48 ,  C25D1/08 ,  B32B15/01

CPC classification number: C25D1/003 ,  B32B15/01 ,  B33Y10/00 ,  B33Y40/00 ,  B33Y70/00 ,  B33Y80/00 ,  C25D1/08 ,  C25D5/022 ,  C25D5/48 ,  C25D7/005

Abstract: A counterfeiting deterrent device according to one implementation of the disclosure includes a plurality of layers formed by an additive process. Each of the layers may have a thickness of less than 100 microns. At least one of the layers has a series of indentations formed in an outer edge of the layer such that the indentations can be observed to verify that the device originated from a predetermined source. According to another implementation, a counterfeiting deterrent device includes at least one raised layer having outer edges in the shape of a logo. A light source is configured and arranged to shine a light through a slit in a substrate layer of the device and past an intermediate layer to light up the outer edge of the raised layer. The layers of the device are formed by an additive process and have a thickness of less than 100 microns each.

公开(公告)号：US20180241112A1

公开(公告)日：2018-08-23

申请号：US15887921

申请日：2018-02-02

Applicant: Microfabrica Inc.

Inventor： Elliott R. Brown ,  John D. Evans ,  Christopher A. Bang ,  Adam L. Cohen ,  Michael S. Lockard ,  Dennis R. Smalley ,  Morton Grosser

IPC: H01P3/06 ,  C25D5/10 ,  C25D1/00 ,  C25D5/02

CPC classification number: H01P3/06 ,  C25D1/003 ,  C25D5/022 ,  C25D5/10

Abstract: RF and microwave radiation directing or controlling components are provided that may be monolithic, that may be formed from a plurality of electrodeposition operations and/or from a plurality of deposited layers of material, that may include switches, inductors, antennae, transmission lines, filters, hybrid couplers, antenna arrays and/or other active or passive components. Components may include non-radiation-entry and non-radiation-exit channels that are useful in separating sacrificial materials from structural materials. Preferred formation processes use electrochemical fabrication techniques (e.g. including selective depositions, bulk depositions, etching operations and planarization operations) and post-deposition processes (e.g. selective etching operations and/or back filling operations).

公开(公告)号：US20170260636A1

公开(公告)日：2017-09-14

申请号：US15389149

申请日：2016-12-22

Applicant: Microfabrica Inc.

Inventor： Gregory P. Schmitz ,  Michael S. Lockard ,  Ming-Ting Wu ,  Eric C. Miller ,  Adam L. Cohen

IPC: C25D1/00

CPC classification number: C25D1/003 ,  B32B15/01 ,  B33Y10/00 ,  B33Y40/00 ,  B33Y70/00 ,  B33Y80/00 ,  C25D1/08 ,  C25D5/022 ,  C25D5/48 ,  C25D7/005

Abstract: A counterfeiting deterrent device according to one implementation of the disclosure includes a plurality of layers formed by an additive process. Each of the layers may have a thickness of less than 100 microns. At least one of the layers has a series of indentations formed in an outer edge of the layer such that the indentations can be observed to verify that the device originated from a predetermined source. According to another implementation, a counterfeiting deterrent device includes at least one raised layer having outer edges in the shape of a logo. A light source is configured and arranged to shine a light through a slit in a substrate layer of the device and past an intermediate layer to light up the outer edge of the raised layer. The layers of the device are formed by an additive process and have a thickness of less than 100 microns each.

公开(公告)号：US20140209470A1

公开(公告)日：2014-07-31

申请号：US14184362

申请日：2014-02-19

Applicant: Microfabrica Inc.

Inventor： Jeffrey A. Thompson ,  Adam L. Cohen ,  Michael S. Lockard ,  Dennis R. Smalley

IPC: C25D1/00

CPC classification number: C25D1/003 ,  B81C1/00373 ,  B81C2201/0181 ,  B81C2201/019

Abstract: Multilayer structures are electrochemically fabricated on a temporary (e.g. conductive) substrate and are thereafter bonded to a permanent (e.g. dielectric, patterned, multi-material, or otherwise functional) substrate and removed from the temporary substrate. In some embodiments, the structures are formed from top layer to bottom layer, such that the bottom layer of the structure becomes adhered to the permanent substrate, while in other embodiments the structures are formed from bottom layer to top layer and then a double substrate swap occurs. The permanent substrate may be a solid that is bonded (e.g. by an adhesive) to the layered structure or it may start out as a flowable material that is solidified adjacent to or partially surrounding a portion of the structure with bonding occurring during solidification. The multilayer structure may be released from a sacrificial material prior to attaching the permanent substrate or it may be released after attachment.

Abstract translation: 多层结构在临时的（例如导电的）衬底上电化学地制造，然后在永久（例如电介质，图案化，多材料或其他功能）的衬底上结合并从临时衬底去除。 在一些实施例中，结构由顶层到底层形成，使得结构的底层变得粘附到永久性基底上，而在其它实施例中，结构由底层到顶层形成，然后是双层衬底交换 发生。 永久性基材可以是与层状结构结合的固体（例如通过粘合剂），或者可以作为在凝固期间发生结合而邻近或部分地围绕结构的一部分固化的可流动材料开始。 多层结构可以在附着永久性基底之前从牺牲材料上释放，或者在附着后可以释放多层结构。

公开(公告)号：US10801119B2

公开(公告)日：2020-10-13

申请号：US16182989

申请日：2018-11-07

Applicant: Microfabrica Inc.

Inventor： Gregory P. Schmitz ,  Michael S. Lockard ,  Ming-Ting Wu ,  Eric C. Miller ,  Adam L. Cohen

IPC: G07F19/00 ,  C25D1/00 ,  B32B15/01 ,  C25D5/02 ,  C25D5/48 ,  C25D1/08 ,  B33Y10/00 ,  B33Y40/00 ,  B33Y80/00 ,  B33Y70/00 ,  C25D7/00

Abstract: A counterfeiting deterrent device according to one implementation of the disclosure includes a plurality of layers formed by an additive process. Each of the layers may have a thickness of less than 100 microns. At least one of the layers has a series of indentations formed in an outer edge of the layer such that the indentations can be observed to verify that the device originated from a predetermined source. According to another implementation, a counterfeiting deterrent device includes at least one raised layer having outer edges in the shape of a logo. A light source is configured and arranged to shine a light through a slit in a substrate layer of the device and past an intermediate layer to light up the outer edge of the raised layer. The layers of the device are formed by an additive process and have a thickness of less than 100 microns each.

公开(公告)号：US10297421B1

公开(公告)日：2019-05-21

申请号：US15206782

申请日：2016-07-11

Applicant: Microfabrica Inc.

Inventor： Rulon J. Larsen, III ,  Adam L. Cohen

IPC: C25D5/10 ,  C25D5/48 ,  C25D7/12 ,  H01J37/32

Abstract: Embodiments are directed to forming reentrant multi-layer micro-scale or millimeter scale three dimensional structures, parts, components, or devices where each layer is formed from a plurality of deposited materials and more specifically where each layer is formed from at least one metal structural material and at least one organic sacrificial material (e.g. polymer) that are co-planarized and a portion of the sacrificial material located on a plurality of layers is removed after formation of the plurality of layers via one or more plasma etching operations.

公开(公告)号：US20170247807A1

公开(公告)日：2017-08-31

申请号：US15358027

申请日：2016-11-21

Applicant: Microfabrica Inc.

Inventor： Adam L. Cohen ,  Michael S. Lockard ,  Kieun Kim ,  Qui T. Le ,  Gang Zhang ,  Uri Frodis ,  Dale S. McPherson ,  Dennis R. Smalley

IPC: C25D5/02 ,  C23C18/16 ,  B81C1/00 ,  C25D1/00

CPC classification number: C25D5/022 ,  B81C1/00126 ,  B81C2201/0109 ,  B81C2201/019 ,  C23C18/1605 ,  C23C18/1651 ,  C25D1/003 ,  Y10T156/11 ,  Y10T156/19

Abstract: Some embodiments are directed to techniques for building single layer or multi-layer structures on dielectric or partially dielectric substrates. Certain embodiments deposit seed layer material directly onto substrate materials while others use an intervening adhesion layer material. Some embodiments use different seed layer and/or adhesion layer materials for sacrificial and structural conductive building materials. Some embodiments apply seed layer and/or adhesion layer materials in what are effectively selective manners while others apply the materials in blanket fashion. Some embodiments remove extraneous material via planarization operations while other embodiments remove the extraneous material via etching operations. Other embodiments are directed to the electrochemical fabrication of multilayer mesoscale or microscale structures which are formed using at least one conductive structural material, at least one conductive sacrificial material, and at least one dielectric material. In some embodiments the dielectric material is a UV-curable photopolymer.

公开(公告)号：US09540233B2

公开(公告)日：2017-01-10

申请号：US14194564

申请日：2014-02-28

Applicant: Microfabrica Inc.

Inventor： Ananda H. Kumar ,  Jorge S. Albarran ,  Adam L. Cohen ,  Kieun Kim ,  Michael S. Lockard ,  Uri Frodis ,  Dennis R. Smalley

IPC: B81C1/00 ,  C25D5/02

CPC classification number: B81C1/00666 ,  C25D5/022

Abstract: Electrochemical fabrication processes and apparatus for producing single layer or multi-layer structures where each layer includes the deposition of at least two materials and wherein the formation of at least some layers includes operations for reducing stress and/or curvature distortion when the structure is released from a sacrificial material which surrounded it during formation and possibly when released from a substrate on which it was formed. Six primary groups of embodiments are presented which are divide into eleven primary embodiments. Some embodiments attempt to remove stress to minimize distortion while others attempt to balance stress to minimize distortion.

Abstract translation: 用于生产单层或多层结构的电化学制造方法和装置，其中每个层包括至少两种材料的沉积，并且其中形成至少一些层包括当结构被释放时减少应力和/或曲率失真的操作 牺牲材料，其在形成期间包围它，并且可能当从其形成的基底释放时。 呈现了六个主要实施例的组，它们分为十一个主要实施例。 一些实施例尝试去除应力以最小化失真，而另一些实施例试图平衡应力以最小化失真。