-
公开(公告)号：US10676836B2
公开(公告)日：2020-06-09
申请号：US16118267
申请日：2018-08-30
Applicant: Microfabrica Inc.
Inventor： Adam L. Cohen , Michael S. Lockard , Kieun Kim , Qui T. Le , Gang Zhang , Uri Frodis , Dale S. McPherson , Dennis R. Smalley
Abstract: Some embodiments are directed to techniques for building single layer or multi-layer structures on dielectric or partially dielectric substrates. Certain embodiments deposit seed layer material directly onto substrate materials while others use an intervening adhesion layer material. Some embodiments use different seed layer and/or adhesion layer materials for sacrificial and structural conductive building materials. Some embodiments apply seed layer and/or adhesion layer materials in what are effectively selective manners while others apply the materials in blanket fashion. Some embodiments remove extraneous material via planarization operations while other embodiments remove the extraneous material via etching operations. Other embodiments are directed to the electrochemical fabrication of multilayer mesoscale or microscale structures which are formed using at least one conductive structural material, at least one conductive sacrificial material, and at least one dielectric material. In some embodiments the dielectric material is a UV-curable photopolymer.
-
2.发明申请公开(公告)号：US20170247807A1
公开(公告)日：2017-08-31
申请号：US15358027
申请日：2016-11-21
Applicant: Microfabrica Inc.
Inventor： Adam L. Cohen , Michael S. Lockard , Kieun Kim , Qui T. Le , Gang Zhang , Uri Frodis , Dale S. McPherson , Dennis R. Smalley
CPC classification number: C25D5/022 , B81C1/00126 , B81C2201/0109 , B81C2201/019 , C23C18/1605 , C23C18/1651 , C25D1/003 , Y10T156/11 , Y10T156/19
Abstract: Some embodiments are directed to techniques for building single layer or multi-layer structures on dielectric or partially dielectric substrates. Certain embodiments deposit seed layer material directly onto substrate materials while others use an intervening adhesion layer material. Some embodiments use different seed layer and/or adhesion layer materials for sacrificial and structural conductive building materials. Some embodiments apply seed layer and/or adhesion layer materials in what are effectively selective manners while others apply the materials in blanket fashion. Some embodiments remove extraneous material via planarization operations while other embodiments remove the extraneous material via etching operations. Other embodiments are directed to the electrochemical fabrication of multilayer mesoscale or microscale structures which are formed using at least one conductive structural material, at least one conductive sacrificial material, and at least one dielectric material. In some embodiments the dielectric material is a UV-curable photopolymer.
-
3.发明授权Methods of forming three-dimensional structures having reduced stress and/or curvature 有权形成具有减小的应力和/或曲率的三维结构的方法公开(公告)号：US09540233B2
公开(公告)日：2017-01-10
申请号：US14194564
申请日：2014-02-28
Applicant: Microfabrica Inc.
Inventor： Ananda H. Kumar , Jorge S. Albarran , Adam L. Cohen , Kieun Kim , Michael S. Lockard , Uri Frodis , Dennis R. Smalley
CPC classification number: B81C1/00666 , C25D5/022
Abstract: Electrochemical fabrication processes and apparatus for producing single layer or multi-layer structures where each layer includes the deposition of at least two materials and wherein the formation of at least some layers includes operations for reducing stress and/or curvature distortion when the structure is released from a sacrificial material which surrounded it during formation and possibly when released from a substrate on which it was formed. Six primary groups of embodiments are presented which are divide into eleven primary embodiments. Some embodiments attempt to remove stress to minimize distortion while others attempt to balance stress to minimize distortion.
Abstract translation: 用于生产单层或多层结构的电化学制造方法和装置，其中每个层包括至少两种材料的沉积，并且其中形成至少一些层包括当结构被释放时减少应力和/或曲率失真的操作 牺牲材料，其在形成期间包围它，并且可能当从其形成的基底释放时。 呈现了六个主要实施例的组，它们分为十一个主要实施例。 一些实施例尝试去除应力以最小化失真，而另一些实施例试图平衡应力以最小化失真。
-
公开(公告)号：US09919472B1
公开(公告)日：2018-03-20
申请号：US14280517
申请日：2014-05-16
Applicant: Microfabrica Inc.
Inventor： Adam L. Cohen , Michael S. Lockard , Rulon J. Larsen, III , Uri Frodis , Kieun Kim , Dennis R. Smalley
CPC classification number: B23K20/00 , B23K20/10 , B23K26/0624 , B23K26/18 , B23K26/38 , B23K26/40 , B23K2101/40 , B23K2103/04 , B23K2103/14 , B23K2103/26 , B23K2103/50 , G01R1/06738 , G01R1/06744 , G01R3/00
Abstract: Embodiments are directed to methods of producing devices using modified multi-layer, multi-material electrochemical fabrication processes and/or using a laser cutting processes wherein individual layers or layer groups are formed and then stacked and bonded to produce prototypes or production parts. The methods can reduce the cost and lead time of prototyping when compared with previous multi-layer, multi-material electrochemical fabrication processes and can also reduce the lead time of production quantities, by allowing multiple layers of a multilayer device to be formed simultaneously, e.g. in parallel on the same wafer. Additionally, these methods may be used to extend the maximum height to which parts may practically be made. Finally, the methods allow geometries that are impossible, impractical or difficult to release (e.g. microfluidic devices such as pumps or parts with long, narrow channels) to be fabricated in multiple pieces and then joined after full or partial release.
-
公开(公告)号：US20150108002A1
公开(公告)日：2015-04-23
申请号：US14572472
申请日：2014-12-16
Applicant: Microfabrica Inc.
Inventor： Kieun Kim , Adam L. Cohen , Willa M. Larsen , Richard Chen , Ananda H. Kumar , Ezekiel J.J. Kruglick , Vacit Arat , Gang Zhang , Michael S. Lockard , Christopher A. Bang , Jeffrey A. Thompson
CPC classification number: C25D1/003
Abstract: Embodiments of the present invention are directed to the formation of microprobe tips elements having a variety of configurations. In some embodiments tips are formed from the same building material as the probes themselves, while in other embodiments the tips may be formed from a different material and/or may include a coating material. In some embodiments, the tips are formed before the main portions of the probes and the tips are formed in proximity to or in contact with a temporary substrate. Probe tip patterning may occur in a variety of different ways, including, for example, via molding in patterned holes that have been isotropically or anisotropically etched silicon, via molding in voids formed in exposed photoresist, via molding in voids in a sacrificial material that have formed as a result of the sacrificial material mushrooming over carefully sized and located regions of dielectric material, via isotropic etching of the tip material around carefully sized and placed etching shields, via hot pressing, and the like.
Abstract translation: 本发明的实施例涉及形成具有各种构造的微探针尖元件。 在一些实施例中，尖端由与探针本身相同的建筑材料形成，而在其它实施例中，尖端可以由不同的材料形成和/或可以包括涂层材料。 在一些实施例中，尖端在探针的主要部分之前形成，并且尖端形成在临时衬底附近或与临时衬底接触。 探针尖端图案化可以以各种不同的方式发生，包括例如通过在各向异性或各向异性地蚀刻硅的图案化孔中模制，通过在曝光的光致抗蚀剂中形成的空隙中模制，通过在牺牲材料中的空隙中模制， 由于牺牲材料通过电介质材料的细小尺寸和定位的区域，经由热压等等仔细地尺寸和放置的蚀刻屏蔽部分上的尖端材料的各向同性蚀刻而形成。
-
Patent Agency Ranking
6.发明申请Methods of Forming Three-Dimensional Structures Having Reduced Stress and/or Curvature 有权形成具有减小的应力和/或曲率的三维结构的方法公开(公告)号：US20140238865A1
公开(公告)日：2014-08-28
申请号：US14194564
申请日：2014-02-28
Applicant: Microfabrica Inc.
Inventor： Ananda H. Kumar , Jorge S. Alberron , Adam L. Cohen , Kieun Kim , Michael S. Lockard , Uri Frodis , Dennis R. Smalley
CPC classification number: B81C1/00666 , C25D5/022
Abstract: Electrochemical fabrication processes and apparatus for producing single layer or multi-layer structures where each layer includes the deposition of at least two materials and wherein the formation of at least some layers includes operations for reducing stress and/or curvature distortion when the structure is released from a sacrificial material which surrounded it during formation and possibly when released from a substrate on which it was formed. Six primary groups of embodiments are presented which are divide into eleven primary embodiments. Some embodiments attempt to remove stress to minimize distortion while others attempt to balance stress to minimize distortion.
Abstract translation: 用于生产单层或多层结构的电化学制造方法和装置，其中每个层包括至少两种材料的沉积，并且其中形成至少一些层包括当结构被释放时减少应力和/或曲率失真的操作 牺牲材料，其在形成期间包围它，并且可能当从其形成的基底释放时。 呈现了六个主要实施例的组，它们分为十一个主要实施例。 一些实施例尝试去除应力以最小化失真，而另一些实施例试图平衡应力以最小化失真。
-
7.发明申请公开(公告)号：US20190017189A1
公开(公告)日：2019-01-17
申请号：US16118267
申请日：2018-08-30
Applicant: Microfabrica Inc.
Inventor： Adam L. Cohen , Michael S. Lockard , Kieun Kim , Qui T. Le , Gang Zhang , Uri Frodis , Dale S. McPherson , Dennis R. Smalley
CPC classification number: C25D5/022 , B81C1/00126 , B81C2201/0109 , B81C2201/019 , C23C18/1605 , C23C18/1651 , C25D1/003 , Y10T156/11 , Y10T156/19
Abstract: Some embodiments are directed to techniques for building single layer or multi-layer structures on dielectric or partially dielectric substrates. Certain embodiments deposit seed layer material directly onto substrate materials while others use an intervening adhesion layer material. Some embodiments use different seed layer and/or adhesion layer materials for sacrificial and structural conductive building materials. Some embodiments apply seed layer and/or adhesion layer materials in what are effectively selective manners while others apply the materials in blanket fashion. Some embodiments remove extraneous material via planarization operations while other embodiments remove the extraneous material via etching operations. Other embodiments are directed to the electrochemical fabrication of multilayer mesoscale or microscale structures which are formed using at least one conductive structural material, at least one conductive sacrificial material, and at least one dielectric material. In some embodiments the dielectric material is a UV-curable photopolymer.
-
8.发明授权Electrochemical fabrication methods incorporating dielectric materials and/or using dielectric substrates 有权电介质材料和/或使用电介质基片的电化学制造方法公开(公告)号：US09546431B2
公开(公告)日：2017-01-17
申请号：US14185613
申请日：2014-02-20
Applicant: Microfabrica Inc.
Inventor： Adam L. Cohen , Michael S. Lockard , Kieun Kim , Qui T. Le , Gang Zhang , Uri Frodis , Dale S. McPherson , Dennis R. Smalley
CPC classification number: C25D5/022 , B81C1/00126 , B81C2201/0109 , B81C2201/019 , C23C18/1605 , C23C18/1651 , C25D1/003 , Y10T156/11 , Y10T156/19
Abstract: Some embodiments of the present invention are directed to techniques for building up single layer or multi-layer structures on dielectric or partially dielectric substrates. Certain embodiments deposit seed layer material directly onto substrate materials while other embodiments use an intervening adhesion layer material. Some embodiments use different seed layer materials and/or adhesion layer materials for sacrificial and structural conductive building materials. Some embodiments apply seed layer and/or adhesion layer materials in what are effectively selective manners while other embodiments apply the materials in blanket fashion. Some embodiments remove extraneous depositions (e.g. depositions to regions unintended to form part of a layer) via planarization operations while other embodiments remove the extraneous material via etching operations. Other embodiments are directed to the electrochemical fabrication of multilayer mesoscale or microscale structures which are formed using at least one conductive structural material, at least one conductive sacrificial material, and at least one dielectric material. In some embodiments the dielectric material is a UV-curable photopolymer.
Abstract translation: 本发明的一些实施例涉及在电介质或部分电介质基底上建立单层或多层结构的技术。 某些实施方案将种子层材料直接沉积到基底材料上，而其它实施例使用中间粘合层材料。 一些实施例使用不同种子层材料和/或用于牺牲和结构导电建筑材料的粘合层材料。 一些实施例将种子层和/或粘合层材料应用于有选择性的方式，而其它实施例以毯子的方式应用材料。 一些实施例通过平面化操作去除外来沉积物（例如沉积到不想要形成层的一部分的区域），而其他实施例通过蚀刻操作去除外来材料。 其它实施方案涉及使用至少一种导电结构材料，至少一种导电牺牲材料和至少一种电介质材料形成的多层中尺度或微结构结构的电化学制造。 在一些实施方案中，电介质材料是可UV固化的光聚合物。
-
9.发明申请Method of Electrochemically Fabricating Multilayer Structures Having Improved Interlayer Adhesion 有权电化学制造具有改善的层间粘附性的多层结构的方法公开(公告)号：US20140216941A1
公开(公告)日：2014-08-07
申请号：US14185530
申请日：2014-02-20
Applicant: Microfabrica Inc.
Inventor： Gang Zhang , Adam L. Cohen , Michael S. Lockard , Ananda H. Kumar , Ezekiel J.J. Kruglick , Kieun Kim
CPC classification number: C25D5/50 , C25D1/003 , C25D5/022 , C25D5/10 , C25D5/12 , C25D5/14 , C25D5/18 , C25D5/34 , C25D5/40 , C25D5/48 , H01L21/2885 , H01L21/76879 , H05K3/241 , H05K3/243
Abstract: Multi-layer microscale or mesoscale structures are fabricated with adhered layers (e.g. layers that are bonded together upon deposition of successive layers to previous layers) and are then subjected to a heat treatment operation that enhances the interlayer adhesion significantly. The heat treatment operation is believed to result in diffusion of material across the layer boundaries and associated enhancement in adhesion (i.e. diffusion bonding). Interlayer adhesion and maybe intra-layer cohesion may be enhanced by heat treating in the presence of a reducing atmosphere that may help remove weaker oxides from surfaces or even from internal portions of layers.
Abstract translation: 多层微尺度或中尺度结构用粘附层（例如在连续层沉积到先前层上时结合在一起的层）制造，然后进行显着增强层间粘合的热处理操作。 认为热处理操作导致材料在层边界上的扩散，并且附着力增强（即扩散粘合）。 可以通过在有助于从表面甚至从内部部分去除较弱的氧化物的还原气氛的热处理来增强层间粘附和可能的层内内聚力。
-
10.发明申请公开(公告)号：US20140209473A1
公开(公告)日：2014-07-31
申请号：US14185613
申请日：2014-02-20
Applicant: Microfabrica Inc.
Inventor： Adam L. Cohen , Michael S. Lockard , Kieun Kim , Qui T. Le , Gang Zhang , Uri Frodis , Dale S. McPherson , Dennis R. Smalley
IPC: C25D5/02
CPC classification number: C25D5/022 , B81C1/00126 , B81C2201/0109 , B81C2201/019 , C23C18/1605 , C23C18/1651 , C25D1/003 , Y10T156/11 , Y10T156/19
Abstract: Some embodiments of the present invention are directed to techniques for building up single layer or multi-layer structures on dielectric or partially dielectric substrates. Certain embodiments deposit seed layer material directly onto substrate materials while other embodiments use an intervening adhesion layer material. Some embodiments use different seed layer materials and/or adhesion layer materials for sacrificial and structural conductive building materials. Some embodiments apply seed layer and/or adhesion layer materials in what are effectively selective manners while other embodiments apply the materials in blanket fashion. Some embodiments remove extraneous depositions (e.g. depositions to regions unintended to form part of a layer) via planarization operations while other embodiments remove the extraneous material via etching operations. Other embodiments are directed to the electrochemical fabrication of multilayer mesoscale or microscale structures which are formed using at least one conductive structural material, at least one conductive sacrificial material, and at least one dielectric material. In some embodiments the dielectric material is a UV-curable photopolymer.
Abstract translation: 本发明的一些实施例涉及在电介质或部分电介质基底上建立单层或多层结构的技术。 某些实施方案将种子层材料直接沉积到基底材料上，而其它实施例使用中间粘合层材料。 一些实施例使用不同种子层材料和/或用于牺牲和结构导电建筑材料的粘合层材料。 一些实施例将种子层和/或粘合层材料应用于有选择性的方式，而其它实施例以毯子的方式应用材料。 一些实施例通过平面化操作去除外来沉积物（例如沉积到不想要形成层的一部分的区域），而其他实施例通过蚀刻操作去除外来材料。 其它实施方案涉及使用至少一种导电结构材料，至少一种导电牺牲材料和至少一种电介质材料形成的多层中尺度或微结构结构的电化学制造。 在一些实施方案中，电介质材料是可UV固化的光聚合物。
-
-
-
-
-
-
-
-
-
Search Results
11
records
(took 0.02 seconds)
