公开(公告)号：US09229328B2

公开(公告)日：2016-01-05

申请号：US13875918

申请日：2013-05-02

Applicant: Micron Technology, Inc.

Inventor： Ranjan Khurana ,  Gurpreet S. Lugani ,  Dan B. Millward

IPC: G03F7/40

CPC classification number: G03F7/40 ,  G03F7/0002

Abstract: A method of forming a semiconductor device structure comprises forming a template material over a substrate, the template material exhibiting preferential wetting to a polymer block of a block copolymer. A positive tone photoresist material is formed over the template material. The positive tone photoresist material is exposed to radiation to form photoexposed regions and non-photoexposed regions of the positive tone photoresist material. The non-photoexposed regions of the positive tone photoresist material are removed with a negative tone developer to form a pattern of photoresist features. The pattern of photoresist features and unprotected portions of the template material are exposed to an oxidizing plasma to form trimmed photoresist features and a pattern of template features. The trimmed photoresist features are removed with a positive tone developer. Other methods of forming a semiconductor device structure, and a semiconductor device structure are also described.

Abstract translation: 形成半导体器件结构的方法包括在衬底上形成模板材料，该模板材料对嵌段共聚物的聚合物嵌段表现优先润湿。 在模板材料上形成正色调光致抗蚀剂材料。 正色光致抗蚀剂材料暴露于辐射以形成正色调光致抗蚀剂材料的光引射区域和非光照区域。 用负色调显影剂除去正色调光致抗蚀剂材料的非光引射区域以形成光刻胶特征图案。 模板材料的光致抗蚀剂特征图案和未保护部分的图案暴露于氧化等离子体以形成修整的光致抗蚀剂特征和模板特征图案。 用正色调显影剂除去修剪的光致抗蚀剂特征。 还描述了形成半导体器件结构的其它方法以及半导体器件结构。

公开(公告)号：US11980108B2

公开(公告)日：2024-05-07

申请号：US17881285

申请日：2022-08-04

Applicant: Micron Technology, Inc.

Inventor： Farrell M. Good ,  Robert K. Grubbs ,  Gurpreet S. Lugani

IPC: H10N70/00

CPC classification number: H10N70/063 ,  H10N70/826 ,  H10N70/882

Abstract: Techniques are described to form a liner to protect a material, such as a storage element material, from damage during subsequent operations or phases of a manufacturing process. The liner may be bonded to the material (e.g., a chalcogenide material) using a strong bond or a weak bond. In some cases, a sealant material may be deposited during an etching phase of the manufacturing process to prevent subsequent etching operations from damaging a material that has just been etched.

公开(公告)号：US10811419B1

公开(公告)日：2020-10-20

申请号：US16419730

申请日：2019-05-22

Applicant: Micron Technology, Inc.

Inventor： Devesh Dadhich Shreeram ,  Sanket S. Kelkar ,  Gurpreet S. Lugani ,  Paul A. Paduano ,  Matthew N. Rocklein ,  Sanjeev Sapra ,  Christopher W. Petz

IPC: H01L27/108 ,  H01L49/02

Abstract: Methods, apparatuses, and systems related to shaping a storage node material are described. An example method includes forming a pillar with a pattern of materials. The method further includes depositing a storage node material on a side of the pillar. The method further includes etching sacrificial materials within the pillar. The method further includes etching the storage node material in a direction from the pillar into the storage node.

公开(公告)号：US20210202841A1

公开(公告)日：2021-07-01

申请号：US16731963

申请日：2019-12-31

Applicant: Micron Technology, Inc.

Inventor： Farrell M. Good ,  Robert K. Grubbs ,  Gurpreet S. Lugani

IPC: H01L45/00

Abstract: Techniques are described to form a liner to protect a material, such as a storage element material, from damage during subsequent operations or phases of a manufacturing process. The liner may be bonded to the material (e.g., a chalcogenide material) using a strong bond or a weak bond. In some cases, a sealant material may be deposited during an etching phase of the manufacturing process to prevent subsequent etching operations from damaging a material that has just been etched.

公开(公告)号：US20140329179A1

公开(公告)日：2014-11-06

申请号：US13875918

申请日：2013-05-02

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Ranjan Khurana ,  Gurpreet S. Lugani ,  Dan B. Millward

IPC: G03F7/40

CPC classification number: G03F7/40 ,  G03F7/0002

Abstract: A method of forming a semiconductor device structure comprises forming a template material over a substrate, the template material exhibiting preferential wetting to a polymer block of a block copolymer. A positive tone photoresist material is formed over the template material. The positive tone photoresist material is exposed to radiation to form photoexposed regions and non-photoexposed regions of the positive tone photoresist material. The non-photoexposed regions of the positive tone photoresist material are removed with a negative tone developer to form a pattern of photoresist features. The pattern of photoresist features and unprotected portions of the template material are exposed to an oxidizing plasma to form trimmed photoresist features and a pattern of template features. The trimmed photoresist features are removed with a positive tone developer. Other methods of forming a semiconductor device structure, and a semiconductor device structure are also described.

Abstract translation: 形成半导体器件结构的方法包括在衬底上形成模板材料，该模板材料对嵌段共聚物的聚合物嵌段表现优先润湿。 在模板材料上形成正色调光致抗蚀剂材料。 正色光致抗蚀剂材料暴露于辐射以形成正色调光致抗蚀剂材料的光引射区域和非光照区域。 用负色调显影剂除去正色调光致抗蚀剂材料的非光引射区域以形成光刻胶特征图案。 模板材料的光致抗蚀剂特征图案和未保护部分的图案暴露于氧化等离子体以形成修整的光致抗蚀剂特征和模板特征图案。 用正色调显影剂除去修剪的光致抗蚀剂特征。 还描述了形成半导体器件结构的其它方法以及半导体器件结构。

公开(公告)号：US20240268240A1

公开(公告)日：2024-08-08

申请号：US18634079

申请日：2024-04-12

Applicant: Micron Technology, Inc.

Inventor： Farrell M. Good ,  Robert K. Grubbs ,  Gurpreet S. Lugani

IPC: H10N70/00

CPC classification number: H10N70/063 ,  H10N70/826 ,  H10N70/882

Abstract: Techniques are described to form a liner to protect a material, such as a storage element material, from damage during subsequent operations or phases of a manufacturing process. The liner may be bonded to the material (e.g., a chalcogenide material) using a strong bond or a weak bond. In some cases, a sealant material may be deposited during an etching phase of the manufacturing process to prevent subsequent etching operations from damaging a material that has just been etched.

公开(公告)号：US20230023105A1

公开(公告)日：2023-01-26

申请号：US17881285

申请日：2022-08-04

Applicant: Micron Technology, Inc.

Inventor： Farrell M. Good ,  Robert K. Grubbs ,  Gurpreet S. Lugani

IPC: H01L45/00

Abstract: Techniques are described to form a liner to protect a material, such as a storage element material, from damage during subsequent operations or phases of a manufacturing process. The liner may be bonded to the material (e.g., a chalcogenide material) using a strong bond or a weak bond. In some cases, a sealant material may be deposited during an etching phase of the manufacturing process to prevent subsequent etching operations from damaging a material that has just been etched.

公开(公告)号：US11417840B2

公开(公告)日：2022-08-16

申请号：US16731963

申请日：2019-12-31

Applicant: Micron Technology, Inc.

Inventor： Farrell M. Good ,  Robert K. Grubbs ,  Gurpreet S. Lugani

IPC: H01L45/00

Abstract: Techniques are described to form a liner to protect a material, such as a storage element material, from damage during subsequent operations or phases of a manufacturing process. The liner may be bonded to the material (e.g., a chalcogenide material) using a strong bond or a weak bond. In some cases, a sealant material may be deposited during an etching phase of the manufacturing process to prevent subsequent etching operations from damaging a material that has just been etched.