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1.发明授权Pulse output circuit, driving circuit for display device and display device using the pulse output circuit, and pulse output method 失效脉冲输出电路，显示装置的驱动电路和使用脉冲输出电路的显示装置，以及脉冲输出方式公开(公告)号：US07786968B2
公开(公告)日：2010-08-31
申请号：US11002684
申请日：2004-12-03
IPC分类号： H03M1/50
CPC分类号： G09G3/3688 , G09G2310/0289 , G09G2310/0294
摘要： An output pulse of a flip flop is delayed in a delay inverter circuit before supplied to an input terminal of a level shifter. Then, an output pulse of the next stage flip flop is supplied to a reset terminal of the first flip flop and also to an enable terminal of the level shifter. Further, the level shifter output a sampling pulse with a beginning end equal to the beginning end of the pulse supplied to the input terminal and a terminal and equal to the beginning and of the pulse supplied to the enable terminal. With this arrangement, the subject invention provides a pulse output circuit, a driving circuit for a display device using the pulse output circuit, a display device and a pulse output method, that reduce delay of the terminal end of the pulse in sequentially outputting pulses from plural output terminals.
摘要翻译： 触发器的输出脉冲在提供给电平移位器的输入端子之前在延迟逆变器电路中被延迟。 然后，下一级触发器的输出脉冲被提供给第一触发器的复位端，并且还提供给电平移位器的使能端。 此外，电平移位器输出采样脉冲，其开始端等于提供给输入端子的脉冲的起始端和等于提供给使能端的脉冲的开始和脉冲。 通过这种布置，本发明提供了一种脉冲输出电路，一种使用脉冲输出电路的显示装置的驱动电路，一种显示装置和一种脉冲输出方法，该方法减少脉冲终端的延迟，从而顺序地从 多个输出端子。
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2.发明申请Pulse output circuit, driving circuit for display device and display device using the pulse output circuit, and pulse output method 失效脉冲输出电路，显示装置的驱动电路和使用脉冲输出电路的显示装置，以及脉冲输出方式公开(公告)号：US20050134352A1
公开(公告)日：2005-06-23
申请号：US11002684
申请日：2004-12-03
CPC分类号： G09G3/3688 , G09G2310/0289 , G09G2310/0294
摘要： An output pulse of a flip flop is delayed in a delay inverter circuit before supplied to an input terminal of a level shifter. Then, an output pulse of the next stage flip flop is supplied to a reset terminal of the first flip flop and also to an enable terminal of the level shifter. Further, the level shifter output a sampling pulse with a beginning end equal to the beginning end of the pulse supplied to the input terminal and a terminal and equal to the beginning and of the pulse supplied to the enable terminal. With this arrangement, the subject invention provides a pulse output circuit, a driving circuit for a display device using the pulse output circuit, a display device and a pulse output method, that reduce delay of the terminal end of the pulse in sequentially outputting pulses from plural output terminals.
摘要翻译： 触发器的输出脉冲在提供给电平移位器的输入端子之前在延迟逆变器电路中被延迟。 然后，下一级触发器的输出脉冲被提供给第一触发器的复位端，并且还提供给电平移位器的使能端。 此外，电平移位器输出采样脉冲，其开始端等于提供给输入端子的脉冲的起始端和等于提供给使能端的脉冲的开始和脉冲。 通过这种布置，本发明提供了一种脉冲输出电路，一种使用脉冲输出电路的显示装置的驱动电路，一种显示装置和一种脉冲输出方法，该方法减少脉冲终端的延迟，从而顺序地从 多个输出端子。
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公开(公告)号：US20050088387A1
公开(公告)日：2005-04-28
申请号：US10941082
申请日：2004-09-15
CPC分类号： G09G3/3648 , G09G2310/0251 , G09G2310/0297 , G09G2320/0219
摘要： In each horizontal period, by switching ON switches respectively provided for three data signal lines for R, G and B in a group at the same time only in a predetermined period, the data signal lines in the group are preliminary charged to a predetermined potential at the same time before a data signal supply period. In a subsequent data signal supply period, respective switches of data signal lines for R, G and B are switched ON sequentially, to sequentially supply respective data for R, G and B to pixels on a scanning signal line as selected are supplied via data signal lines. As a result, in a display device driven by time-division based on a group of sequentially provided data signal lines, it is possible to suppress up-throw potential fluctuations when display.
摘要翻译： 在每个水平周期中，通过仅在预定周期内同时分别为组中的R，G和B的三条数据信号线分别设置ON开关，将组中的数据信号线预先充电至预定电位 在数据信号提供期之前的同一时间。 在随后的数据信号供给周期中，对于R，G，B的数据信号线的各自的开关顺序地接通，顺序地向R，G，B的各个数据提供经选择的扫描信号线上的像素，经由数据信号 线条。 结果，在基于一组顺序提供的数据信号线的时分驱动的显示装置中，可以抑制显示时的上投电位波动。
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4.发明授权Drive circuit of display apparatus, pulse generation method, display apparatus 有权显示装置的驱动电路，脉冲发生方法，显示装置公开(公告)号：US08098226B2
公开(公告)日：2012-01-17
申请号：US11921651
申请日：2006-06-12
IPC分类号： G09G3/36
CPC分类号： G09G3/3688
摘要： The subject invention provides a drive circuit for a display apparatus, comprising: a shift register; and a pulse generation circuit for generating a drive pulse signal using an output pulse signal generated in the shift register, wherein: the pulse generation circuit forms a pulse-starting edge and a pulse-termination edge of the drive pulse signal using a rise or a fall of pulse resulting from activation of the output pulse signal. On this account, pulse generation can be performed with high accuracy in a pulse generation circuit used for a drive circuit for a display apparatus or the like.
摘要翻译： 本发明提供了一种用于显示装置的驱动电路，包括：移位寄存器; 以及脉冲发生电路，用于使用在所述移位寄存器中产生的输出脉冲信号来产生驱动脉冲信号，其中：所述脉冲发生电路使用上升沿或者相对的方向形成所述驱动脉冲信号的脉冲起始边沿和脉冲终止边沿 由于输出脉冲信号的激活而产生的脉冲下降。 因此，在用于显示装置的驱动电路等的脉冲发生电路中，可以高精度地进行脉冲发生。
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公开(公告)号：US07701426B2
公开(公告)日：2010-04-20
申请号：US10941082
申请日：2004-09-15
IPC分类号： G09G3/36
CPC分类号： G09G3/3648 , G09G2310/0251 , G09G2310/0297 , G09G2320/0219
摘要： In each horizontal period, by switching ON switches respectively provided for three data signal lines for R, G and B in a group at the same time only in a predetermined period, the data signal lines in the group are preliminary charged to a predetermined potential at the same time before a data signal supply period. In a subsequent data signal supply period, respective switches of data signal lines for R, G and B are switched ON sequentially, to sequentially supply respective data for R, G and B to pixels on a scanning signal line as selected are supplied via data signal lines. As a result, in a display device driven by time-division based on a group of sequentially provided data signal lines, it is possible to suppress up-throw potential fluctuations when display.
摘要翻译： 在每个水平周期中，通过仅在预定周期内同时分别为组中的R，G和B的三条数据信号线分别设置ON开关，将组中的数据信号线预先充电至预定电位 在数据信号提供期之前的同一时间。 在随后的数据信号供给周期中，对于R，G，B的数据信号线的各自的开关顺序地接通，顺序地向R，G，B的各个数据提供经选择的扫描信号线上的像素，经由数据信号 线条。 结果，在基于一组顺序提供的数据信号线的时分驱动的显示装置中，可以抑制显示时的上投电位波动。
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6.发明申请Drive Circuit of Display Apparatus, Pulse Generation Method, Display Apparatus 有权显示装置的驱动电路，脉冲发生方法，显示装置公开(公告)号：US20090115758A1
公开(公告)日：2009-05-07
申请号：US11921651
申请日：2006-06-12
IPC分类号： G06F3/038
CPC分类号： G09G3/3688
摘要： The subject invention provides a drive circuit for a display apparatus, comprising: a shift register; and a pulse generation circuit for generating a drive pulse signal using an output pulse signal generated in the shift register, wherein: the pulse generation circuit forms a pulse-starting edge and a pulse-termination edge of the drive pulse signal using a rise or a fall of pulse resulting from activation of the output pulse signal. On this account, pulse generation can be performed with high accuracy in a pulse generation circuit used for a drive circuit for a display apparatus or the like.
摘要翻译： 本发明提供了一种用于显示装置的驱动电路，包括：移位寄存器; 以及脉冲发生电路，用于使用在所述移位寄存器中产生的输出脉冲信号来产生驱动脉冲信号，其中：所述脉冲发生电路使用上升沿或者相对的方向形成所述驱动脉冲信号的脉冲起始边沿和脉冲终止边沿 由于输出脉冲信号的激活而产生的脉冲下降。 因此，在用于显示装置的驱动电路等的脉冲发生电路中，可以高精度地进行脉冲发生。
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公开(公告)号：US08970565B2
公开(公告)日：2015-03-03
申请号：US13378233
申请日：2010-03-18
CPC分类号： G11C19/28 , G09G3/3677 , G09G2310/063
摘要： A stage of the shift register has (i) a set-reset type flip-flop which receives an initialization signal and (ii) a signal generating circuit which receives a simultaneous selection signal and which generates an output signal by use of an output of the flip-flop. In at least one example embodiment, the output of the flip-flop becomes inactive regardless of whether a setting signal and a resetting signal are active or inactive, as long as the initialization signal is active. The initialization signal becomes active before the end of the simultaneous selection, and then becomes inactive after the end of the simultaneous selection. This makes it possible to stabilize operation of the shift register after the end of simultaneous selection of a plurality of signal lines carried out by the display driving circuit at a predetermined timing.
摘要翻译： 移位寄存器的一级具有（i）接收初始化信号的设置复位型触发器，以及（ii）接收同时选择信号并且通过使用输出信号产生输出信号的信号发生电路 拖鞋。 在至少一个示例性实施例中，只要初始化信号有效，触发器的输出就会变得无效，而不管设置信号和复位信号是有效还是无效。 初始化信号在同时选择结束之前变为有效，然后在同时选择结束后变为无效。 这使得可以在预定定时同时选择由显示驱动电路执行的多条信号线结束之后稳定移位寄存器的操作。
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8.发明授权Display driving circuit having a memory circuit, display device, and display driving method 有权具有存储电路，显示装置和显示驱动方法的显示驱动电路公开(公告)号：US08547368B2
公开(公告)日：2013-10-01
申请号：US12734363
申请日：2008-09-02
CPC分类号： G09G3/3677 , G09G3/3655 , G09G2300/0876 , G09G2310/0286 , G09G2310/08 , G09G2320/0219 , G11C19/184
摘要： A display driving circuit of the present invention includes: a source driver (20) which outputs a source signal; a gate driver (30) which outputs a gate signal for turning on a switching element on a row; and a CS driver (40) which outputs a CS signal (CSOUT) whose electric potential is switched in a predetermined direction (low to high or high to low) in accordance with a polarity of the source signal. A CS driver (CSn) on an n-th row outputs a CS signal (CSOUT) to the n-th row in accordance with a gate signal (GLn) for the n-th row outputted from a gate driver (Gn) provided on the n-th row. This makes it possible to provide a display driving circuit which enables CC driving with a simple configuration.
摘要翻译： 本发明的显示驱动电路包括：源极驱动器，其输出源极信号; 栅极驱动器（30），其输出用于导通行上的开关元件的栅极信号; 以及CS驱动器（40），其根据源极信号的极性输出电位从规定的方向（低到高或高到低）切换的CS信号（CSOUT）。 第n行的CS驱动器（CSn）根据从设置在第n行的栅极驱动器（Gn）输出的第n行的栅极信号（GLn）向第n行输出CS信号（CSOUT） 第n行。 这使得可以提供一种能够以简单的结构实现CC驱动的显示驱动电路。
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公开(公告)号：US20100245305A1
公开(公告)日：2010-09-30
申请号：US12734363
申请日：2008-09-02
IPC分类号： G09G5/00
CPC分类号： G09G3/3677 , G09G3/3655 , G09G2300/0876 , G09G2310/0286 , G09G2310/08 , G09G2320/0219 , G11C19/184
摘要： A display driving circuit of the present invention includes: a source driver (20) which outputs a source signal; a gate driver (30) which outputs a gate signal for turning on a switching element on a row; and a CS driver (40) which outputs a CS signal (CSOUT) whose electric potential is switched in a predetermined direction (low to high or high to low) in accordance with a polarity of the source signal. A CS driver (CSn) on an n-th row outputs a CS signal (CSOUT) to the n-th row in accordance with a gate signal (GLn) for the n-th row outputted from a gate driver (Gn) provided on the n-th row. This makes it possible to provide a display driving circuit which enables CC driving with a simple configuration.
摘要翻译： 本发明的显示驱动电路包括：源极驱动器（20），其输出源极信号; 栅极驱动器（30），其输出用于导通行上的开关元件的栅极信号; 以及CS驱动器（40），其根据源极信号的极性输出电位从规定的方向（低到高或高到低）切换的CS信号（CSOUT）。 第n行的CS驱动器（CSn）根据从设置在第n行的栅极驱动器（Gn）输出的第n行的栅极信号（GLn）向第n行输出CS信号（CSOUT） 第n行。 这使得可以提供一种能够以简单的结构实现CC驱动的显示驱动电路。
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公开(公告)号：US08952955B2
公开(公告)日：2015-02-10
申请号：US13375778
申请日：2010-02-23
CPC分类号： G09G3/3655 , G09G3/3614 , G09G3/3677 , G09G2300/0852 , G09G2300/0876
摘要： A display driving circuit for driving a liquid crystal display panel includes a shift register including a plurality of shift register circuits provided in such a way as to correspond to a plurality of gate lines, respectively, the display driving circuit having latch circuits provided in such a way as to correspond one-by-one to the shift register circuits, a polarity signal being inputted to the latch circuits. When a internal signal generated by a shift register circuit becomes active, a latch circuit loads and retains the polarity signal, and an output from the latch circuit is supplied to a CS bus line. The internal signal becomes active before a first vertical scanning period of a display picture.
摘要翻译： 用于驱动液晶显示面板的显示驱动电路包括移位寄存器，该移位寄存器包括分别以与多个栅极线相对应的方式设置的多个移位寄存器电路，显示驱动电路具有设置在这种 方式一对一地对应到移位寄存器电路，极性信号被输入到锁存电路。 当由移位寄存器电路产生的内部信号变为有效时，锁存电路加载并保持极性信号，并且将锁存电路的输出提供给CS总线。 内部信号在显示图像的第一垂直扫描周期之前变为有效。
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