Analog-to-digital converter (ADC) with reduced jitter sensitivity and power consumption
    1.
    发明授权
    Analog-to-digital converter (ADC) with reduced jitter sensitivity and power consumption 有权
    模数转换器(ADC)具有降低的抖动灵敏度和功耗

    公开(公告)号:US07852248B1

    公开(公告)日:2010-12-14

    申请号:US12331369

    申请日:2008-12-09

    IPC分类号: H03M3/00

    CPC分类号: H03M3/372 H03M3/458

    摘要: In one embodiment of the present invention, at least at one stage of a Sigma-Delta analog-to-digital converter (ADC) is disclosed to include means for receiving a voltage at least one of the inputs of an operational amplifier, the operational amplifier having at least one output coupled to the at least one of the inputs via an at least one integration capacitor, means for transforming the voltage to a current and means for integrating the current on the at least one of the integration capacitors, during integration time and varying the resistance of at least one of a variable resistors coupled to the operational amplifier during integration time.

    摘要翻译: 在本发明的一个实施例中,公开了Sigma-Delta模数转换器(ADC)的至少一个阶段,以包括用于接收运算放大器的至少一个输入的电压的装置,运算放大器 具有经由至少一个积分电容器耦合到所述至少一个输入的至少一个输出,用于将所述电压转换为电流的装置,以及用于在所述积分时间期间将所述电流集成在所述至少一个所述积分电容器上的装置;以及 在积分时间期间改变耦合到运算放大器的可变电阻器中的至少一个的电阻。

    Digital-to-analog converter (DAC) for high frequency and high resolution environments
    2.
    发明授权
    Digital-to-analog converter (DAC) for high frequency and high resolution environments 有权
    用于高频和高分辨率环境的数模转换器(DAC)

    公开(公告)号:US07675450B1

    公开(公告)日:2010-03-09

    申请号:US12139447

    申请日:2008-06-13

    IPC分类号: H03M1/66

    摘要: A digital-to-analog converter (DAC) configured to operate in high frequency and/or high resolution environments. The DAC has a segmented architecture comprising one or more least significant bit (LSB) thermometer sub-converters and one or more most significant bit (MSB) thermometer sub-converters. A binary converter can also be added. The LSB and MSB thermometer sub-converters include cell pairs with a main cell and a dummy cell. The main cell switches according to actual data, drawing power from a voltage source at each transition. To maintain a consistent voltage level at the output, the dummy cell creates a transition to draw power from the voltage source responsive to a lack of transition in the main cell. Each cell pair has a dedicated voltage source. Also, the MSB thermometer sub-converter can include a load matching circuit to match the parasitic capacitance of the LSB thermometer sub-converter at an output.

    摘要翻译: 配置为在高频和/或高分辨率环境中工作的数模转换器(DAC)。 DAC具有包括一个或多个最低有效位(LSB)温度计子转换器和一个或多个最高有效位(MSB)温度计子转换器)的分段架构。 还可以添加二进制转换器。 LSB和MSB温度计子转换器包括具有主单元和虚设单元的单元对。 主电池根据实际数据切换,每个转换时从电压源抽取功率。 为了在输出端保持一致的电压电平,虚拟电池产生一个转换,以响应于主电池中的过渡不足而从电压源吸取功率。 每个单元对具有专用电压源。 此外,MSB温度计子转换器可以包括负载匹配电路,以匹配LSB温度计子转换器在输出端的寄生电容。

    Load inductor sharing
    3.
    发明授权
    Load inductor sharing 失效
    负载电感共享

    公开(公告)号:US07649416B2

    公开(公告)日:2010-01-19

    申请号:US12236344

    申请日:2008-09-23

    IPC分类号: H03F3/45

    摘要: Sharing one or more load inductors comprises receiving a first input signal at a first terminal of a first amplifier and amplifying the first input signal using the first amplifier. The first amplifier is coupled to one or more load inductors at a second terminal of the first amplifier and is coupled to one or more dedicated source inductors at a third terminal of the first amplifier. Also, a second input signal is received at a first terminal of a second amplifier amplifying the second input signal using the second amplifier. The second amplifier is coupled to the one or more load inductors at a second terminal of the second amplifier and is coupled to one or more dedicated source inductors at a third terminal of the second amplifier.

    摘要翻译: 共享一个或多个负载电感器包括在第一放大器的第一端接收第一输入信号,并使用第一放大器放大第一输入信号。 第一放大器耦合到第一放大器的第二端处的一个或多个负载电感器,并且耦合到第一放大器的第三端处的一个或多个专用源电感器。 此外,在第二放大器的第一端处接收第二输入信号,该第二放大器使用第二放大器放大第二输入信号。 第二放大器耦合到第二放大器的第二端处的一个或多个负载电感器,并且耦合到第二放大器的第三端处的一个或多个专用源电感器。

    LOAD INDUCTOR SHARING
    4.
    发明申请
    LOAD INDUCTOR SHARING 失效
    负载电感共享

    公开(公告)号:US20090085671A1

    公开(公告)日:2009-04-02

    申请号:US12236344

    申请日:2008-09-23

    IPC分类号: H03F3/68 H03F3/45

    摘要: Sharing one or more load inductors comprises receiving a first input signal at a first terminal of a first amplifier and amplifying the first input signal using the first amplifier. The first amplifier is coupled to one or more load inductors at a second terminal of the first amplifier and is coupled to one or more dedicated source inductors at a third terminal of the first amplifier. Also, a second input signal is received at a first terminal of a second amplifier amplifying the second input signal using the second amplifier. The second amplifier is coupled to the one or more load inductors at a second terminal of the second amplifier and is coupled to one or more dedicated source inductors at a third terminal of the second amplifier.

    摘要翻译: 共享一个或多个负载电感器包括在第一放大器的第一端接收第一输入信号,并使用第一放大器放大第一输入信号。 第一放大器耦合到第一放大器的第二端处的一个或多个负载电感器,并且耦合到第一放大器的第三端处的一个或多个专用源电感器。 此外,在第二放大器的第一端处接收第二输入信号,该第二放大器使用第二放大器放大第二输入信号。 第二放大器耦合到第二放大器的第二端处的一个或多个负载电感器,并且耦合到第二放大器的第三端处的一个或多个专用源电感器。

    Sigma delta modulator
    5.
    发明授权
    Sigma delta modulator 有权
    Sigma delta调制器

    公开(公告)号:US06762703B1

    公开(公告)日:2004-07-13

    申请号:US10236008

    申请日:2002-09-04

    申请人: Ali Tabatabaei

    发明人: Ali Tabatabaei

    IPC分类号: H03M300

    CPC分类号: H03M3/442 H03M3/416

    摘要: A system and method are disclosed for providing noise reduction in a sigma delta modulator. Reducing the noise comprises inputting a signal to a plurality of modulator stages; feeding back the signal within at least one of the modulator stages through a feedback loop having a gain wherein the feedback loop provides noise shaping.

    摘要翻译: 公开了一种用于在Σ-Δ调制器中提供降噪的系统和方法。 降低噪声包括将信号输入到多个调制器级; 通过具有增益的反馈回路在至少一个调制器级内反馈信号,其中反馈回路提供噪声整形。

    TIME SEQUENTIAL PROCESSING OPERATIONS
    6.
    发明申请
    TIME SEQUENTIAL PROCESSING OPERATIONS 审中-公开
    时间顺序处理操作

    公开(公告)号:US20090080581A1

    公开(公告)日:2009-03-26

    申请号:US12236342

    申请日:2008-09-23

    IPC分类号: H04B1/10

    摘要: At least some of the arithmetic operations of a filter or other digital process can be performed time sequentially, which may allow the arithmetic elements for the filter or other digital process to be used multiple times for multiple operations.

    摘要翻译: 滤波器或其他数字处理的算术运算的至少一些可以顺序执行,这可以允许用于滤波器或其他数字处理的算术元件多次用于多个操作。

    Power amplifier
    7.
    发明授权
    Power amplifier 有权
    功率放大器

    公开(公告)号:US06784740B1

    公开(公告)日:2004-08-31

    申请号:US10325455

    申请日:2002-12-20

    申请人: Ali Tabatabaei

    发明人: Ali Tabatabaei

    IPC分类号: H03G310

    摘要: A system and method are disclosed for providing amplification to an input signal. The amplifier comprises an amplification stage configured to provide a gain to an input signal and to produce an amplified output, wherein the amplification stage includes an interface configured to receive a biasing voltage. The amplifier also comprises a peak detection feedback network coupled to the amplification stage configured to adjust the biasing voltage, whereby the peak detection feedback network controls the gain of the amplifier.

    摘要翻译: 公开了一种用于向输入信号提供放大的系统和方法。 放大器包括放大级,其被配置为向输入信号提供增益并产生放大的输出,其中放大级包括被配置为接收偏置电压的接口。 放大器还包括耦合到放大级的峰值检测反馈网络,其被配置为调整偏置电压,由此峰值检测反馈网络控制放大器的增益。