摘要:
An adaptive cable equalizer is provided with a simple architecture, wherein a single control structure: controls the adaptation of the filter for compensating for cable length while simultaneously compensating for process and temperature variations; optimizes the SNR at any cable length by controlling biasing current sources; and uses a two-stage architecture which eliminates start-up problems and optimizes output levels to obtain optimal dc restoration while simultaneously allowing for independent optimization of the output levels of the recovered data in accordance with other requirements as desired. An analog adaptive equalizing filter is used for accurately synthesizing the inverse transfer function of cables of variable lengths. Data rates up to and beyond 400 Mbps are supported and the adaptive behavior automatically compensates for different cable lengths as well as process variations (with respect to the process(es) used for fabricating the equalizer in a monolithic form) and temperature variations.
摘要:
A cascode mirror circuit, referred to as a "half-cascode mirror", or "HCM" has first (cascode), second (active), and third (base control) transistors. The cascode and active transistors are connected in series at a first node, the series being connected between a second node and a reference potential. The cascode transistors has its base connected to a second reference voltage. The base control transistor is connected between the supply voltage and a base of the active transistors, with its base connected between the first reference current source and the cascode transistor. Depending upon the selection of input and output signal locations, the circuit can perform various functions, including the generation of an output circuit that varies linearly, logarithmically, or exponentially with an input current, and the generation of an output voltage that varies linearly with the input current.
摘要:
A logarithmic amplifier has first and second mirror circuits, each having active transistors interconnected by a resistor. The current input is applied within one of the mirror circuits so that a logarithmic function thereof is generated for output by an output current mirror circuit. The mirror circuits are similarly constructed with an active transistor, a cascode transistor, and a base current compensating transistor. The cascode and active transistors are connected in series between an input node and a reference potential, or ground, with the base current compensating transistor connected between a supply voltage source and a base of the active transistor. The base of the base current compensating transistor is connected to the reference current input node. Through modification of the basic circuit by injection of an input current to the active transistor with respect to the reference potential, an exponential converter is presented.
摘要:
An amplifier having a rail-to-rail common mode input range that can be used in low voltage power supply applications includes differential input and output stages, the output stage having first and second current paths. First and second output duplicating circuits are respectively connected in parallel with the first and second current paths in the differential output stage to duplicate the differential output. A circuit for detecting a common-mode voltage difference is provided between nodes of the first and second output duplicating circuits for developing a current related to the common-mode voltage difference. A current mirror circuit is connected to receive the current related to the common-mode voltage difference for controlling the current in the first and second current paths in the differential output stage. The circuit for detecting a common-mode voltage difference between nodes of the first and second output duplicating circuits can be established by a transistor that senses only common-mode current. The transistor has a control element connected to the nodes in the output duplicating circuits and a current path to a supply voltage.
摘要:
A current bias, current sense magneto-resistive preamplifier for a hard disk drive and related methods preferably includes an MR sensor responsive to a current bias for sensing a change in magnetic data flux and responsively providing a change in electrical resistance. A preamplifying circuit is preferably connected to the MR sensor for providing the current bias thereto and for amplifying a detected change in electrical resistance. The preamplifying circuit includes a sensor biasing circuit for providing the current bias to the MR sensor and an amplifying output circuit for providing an amplified output signal representative of the detected change in current bias to the MR sensor. The sensor biasing circuit preferably includes a current source, a first amplifying circuit connected to the MR sensor for sensing the change in electrical resistance therefrom, and a second amplifying circuit having a first input connected to the first amplifying circuit and a second input connected to the current source. The sensor biasing circuit also includes a transconductance amplifying circuit connected to first and second outputs of the second amplifying circuit and having an output connected to the first amplifying circuit for providing an output current proportional to the voltage difference at the first and second inputs thereof. The preamplifier further includes a capacitor connected to the preamplifying circuit for providing stability to at least a portion of the preamplifying circuit.
摘要:
A PTAT current source has first and second current mirror circuits, each comprising a cascode transistor, an output transistor in series with the cascode transistor, and a base current compensating transistor having a control element connected to the cascode transistor on a side away from the output transistor, and a current flow path element connected to a current control element of the output transistor, the cascode transistors of the first and second current mirror circuits having differently sized emitter areas. A resistor is connected between the cascode transistors of the first and second current mirror circuits across which a differential current is developed. An output circuit develops a current in the output transistor of the second current mirror circuit. In one embodiment, a third mirror circuit is provided, to cancel a portion of an emitter current flowing in the output transistor of the second current mirror circuit.
摘要:
A power amplifier has a signal input stage to which an input signal is applied to produce an input stage output. An input signal amplifier is connected to receive the input signal to produce an amplified input signal from an active device at an output of the input signal amplifier. A push-pull signal output stage has first and second transistors. The first transistor has a current path connected between a supply voltage and an output node, and the second transistor has a current path connected between a reference voltage and the output node. The amplifier output provides variable drive current directly to a base of the first transistor, thereby enabling increased drive current to be realized. The power amplifier also includes a common mode biasing circuit connected to bias the first and second transistors for class AB operation, and the input stage output provides a signal base drive current to the first transistor separate from the common mode biasing circuit. This further increases the drive current that can be supplied to the base of the first transistor. By virtue of the direct connection of the current path of the first transistor between the supply voltage and the output node, and its base connection to the output of the input signal amplifier, the voltage on the base of the first transistor is enabled to swing to within 1V.sub.ce SAT from the supply voltage.
摘要:
A transistor circuit is provided which generates a collector current through an output transistor which is equal to the base current of a selected transistor in the circuit. This generated base current can be utilized in a variety of applications. Once such application is its use in an accurate cascode current mirror having an output current which is a predetermined multiple of an input current.
摘要:
A transconductor circuit has first and second half cascode mirror circuits. Each half cascode mirror circuit has a cascode transistor, an active transistor, a base current compensating transistor, and a current source connected at one side to a supply voltage and at another side to the cascode transistor. The cascode and active transistors are connected in series between the current source and a first reference potential node. The base current compensating transistor is connected between the supply voltage and the base of the active transistor, and has its base connected between the current source and the cascode transistor. The bases of the cascode transistors of the first and second half cascode mirror circuits are connected to a second reference potential. First and second output mirror circuits are connected to mirror a current in a respective active transistor of the first and second half cascode mirror circuits. When a balanced input voltage is applied to respective voltage input nodes between the cascode and active transistors, corresponding balanced output currents are produced by the first and second output mirror circuits. In floating implementation, a biasing current source is connected between the first reference potential node and ground, and a biasing circuit connected to reference the second reference potential to a potential on the first reference potential node. Since the circuit may be made entirely of NPN transistors, it can run much faster than if PNP transistors were employed. Since the circuit is operated as a "quasi open-loop" circuit, the speed of operation is also enhanced. The circuit can be operated in class AB operation, if desired, or, if desired, in a class B--like mode of operation. Additionally, the output current is independent of the .beta. of the transistors, and the circuit can sink current to the physical limits of the active transistor components, thus enabling a high dynamic range of operation.
摘要:
A wideband current multiplying divider circuit that produces an output current of any ratio to the input current has a first bipolar transistor and a first reference current source connected in series between a supply voltage and ground. A second bipolar transistor and a second reference current source are also connected in series between the supply voltage and around. A summation current source is connected at one side to ground and at the other side to a divided current path. A first resistor is connected in series with the station current source between a base of the first bipolar transistor and ground, and through which an input current can be connected to flow. A second resistor is connected in series with the summation current source between a base of the second bipolar transistor and ground, and through which an output current can be connected to flow. The ratio of the input to output currents is determined by the ratio of the first and second resistors, wherein the output current can be a multiplied or divided value of the input current. The first and second bipolar transistors are NPN transistors, and the first and second reference current sources source substantially equal reference currents. The circuit may further include a cascode circuit connected to substantially remove any Early effect error between the first and second bipolar transistors.