Adaptive cable equalizer
    1.
    发明授权
    Adaptive cable equalizer 失效
    自适应电缆均衡器

    公开(公告)号:US5978417A

    公开(公告)日:1999-11-02

    申请号:US713626

    申请日:1996-09-13

    摘要: An adaptive cable equalizer is provided with a simple architecture, wherein a single control structure: controls the adaptation of the filter for compensating for cable length while simultaneously compensating for process and temperature variations; optimizes the SNR at any cable length by controlling biasing current sources; and uses a two-stage architecture which eliminates start-up problems and optimizes output levels to obtain optimal dc restoration while simultaneously allowing for independent optimization of the output levels of the recovered data in accordance with other requirements as desired. An analog adaptive equalizing filter is used for accurately synthesizing the inverse transfer function of cables of variable lengths. Data rates up to and beyond 400 Mbps are supported and the adaptive behavior automatically compensates for different cable lengths as well as process variations (with respect to the process(es) used for fabricating the equalizer in a monolithic form) and temperature variations.

    摘要翻译: 自适应电缆均衡器具有简单的架构,其中单个控制结构:控制滤波器的适应以补偿电缆长度,同时补偿过程和温度变化; 通过控制偏置电流源优化任何电缆长度的SNR; 并且使用两级架构,其消除启动问题并优化输出电平以获得最佳直流恢复,同时允许根据需要根据其他要求独立地优化恢复数据的输出电平。 模拟自适应均衡滤波器用于精确地合成可变长度的电缆的反向传递函数。 支持高达和超过400Mbps的数据速率,并且自适应行为自动补偿不同的电缆长度以及工艺变化(相对于以整体形式制造均衡器的过程)和温度变化。

    Wideband linear and logarithmic signal conversion circuits
    2.
    发明授权
    Wideband linear and logarithmic signal conversion circuits 失效
    宽带线性和对数信号转换电路

    公开(公告)号:US5444361A

    公开(公告)日:1995-08-22

    申请号:US70274

    申请日:1993-06-01

    申请人: Marc H. Ryat

    发明人: Marc H. Ryat

    IPC分类号: G05F3/26 H03F3/343 G05F3/16

    摘要: A cascode mirror circuit, referred to as a "half-cascode mirror", or "HCM" has first (cascode), second (active), and third (base control) transistors. The cascode and active transistors are connected in series at a first node, the series being connected between a second node and a reference potential. The cascode transistors has its base connected to a second reference voltage. The base control transistor is connected between the supply voltage and a base of the active transistors, with its base connected between the first reference current source and the cascode transistor. Depending upon the selection of input and output signal locations, the circuit can perform various functions, including the generation of an output circuit that varies linearly, logarithmically, or exponentially with an input current, and the generation of an output voltage that varies linearly with the input current.

    摘要翻译: 被称为“半共源反射镜”或“HCM”的共源共栅反射镜电路具有第一(共源共栅),第二(有源)和第三(基极控制)晶体管。 共源共栅和有源晶体管在第一节点处串联连接,该串联连接在第二节点和参考电位之间。 共源共栅晶体管的基极连接到第二参考电压。 基极控制晶体管连接在电源电压和有源晶体管的基极之间,其基极连接在第一参考电流源和共源共栅晶体管之间。 根据输入和输出信号位置的选择,该电路可以执行各种功能,包括生成与输入电流线性,对数或指数变化的输出电路,以及产生与 输入电流。

    Logarithmic and exponential converter circuits
    3.
    发明授权
    Logarithmic and exponential converter circuits 失效
    对数和指数转换器电路

    公开(公告)号:US5471132A

    公开(公告)日:1995-11-28

    申请号:US70276

    申请日:1993-06-01

    申请人: Marc H. Ryat

    发明人: Marc H. Ryat

    IPC分类号: G05F3/26 H03F3/343

    CPC分类号: H03F3/343 G05F3/265

    摘要: A logarithmic amplifier has first and second mirror circuits, each having active transistors interconnected by a resistor. The current input is applied within one of the mirror circuits so that a logarithmic function thereof is generated for output by an output current mirror circuit. The mirror circuits are similarly constructed with an active transistor, a cascode transistor, and a base current compensating transistor. The cascode and active transistors are connected in series between an input node and a reference potential, or ground, with the base current compensating transistor connected between a supply voltage source and a base of the active transistor. The base of the base current compensating transistor is connected to the reference current input node. Through modification of the basic circuit by injection of an input current to the active transistor with respect to the reference potential, an exponential converter is presented.

    摘要翻译: 对数放大器具有第一和第二反射镜电路,每个具有由电阻器互连的有源晶体管。 电流输入被施加在一个反射镜电路内,从而产生其对数函数,用于由输出电流镜电路输出。 镜电路类似地由有源晶体管,共源共栅晶体管和基极电流补偿晶体管构成。 串联和有源晶体管串联连接在输入节点和参考电位或地之间,其中基极电流补偿晶体管连接在电源电压源和有源晶体管的基极之间。 基极电流补偿晶体管的基极连接到参考电流输入节点。 通过将相对于参考电位注入到有源晶体管的输入电流来修改基本电路,呈现指数转换器。

    Differential output amplifier input stage with rail-to-rail common mode
input range
    4.
    发明授权
    Differential output amplifier input stage with rail-to-rail common mode input range 失效
    差分输出放大器输入级,具有轨到轨共模输入范围

    公开(公告)号:US5294893A

    公开(公告)日:1994-03-15

    申请号:US968886

    申请日:1992-10-30

    申请人: Marc H. Ryat

    发明人: Marc H. Ryat

    IPC分类号: H03F3/45

    摘要: An amplifier having a rail-to-rail common mode input range that can be used in low voltage power supply applications includes differential input and output stages, the output stage having first and second current paths. First and second output duplicating circuits are respectively connected in parallel with the first and second current paths in the differential output stage to duplicate the differential output. A circuit for detecting a common-mode voltage difference is provided between nodes of the first and second output duplicating circuits for developing a current related to the common-mode voltage difference. A current mirror circuit is connected to receive the current related to the common-mode voltage difference for controlling the current in the first and second current paths in the differential output stage. The circuit for detecting a common-mode voltage difference between nodes of the first and second output duplicating circuits can be established by a transistor that senses only common-mode current. The transistor has a control element connected to the nodes in the output duplicating circuits and a current path to a supply voltage.

    摘要翻译: 具有可用于低电压电源应用的轨到轨共模输入范围的放大器包括差分输入和输出级,输出级具有第一和第二电流路径。 第一和第二输出复制电路分别与差分输出级中的第一和第二电流路径并联连接以复制差分输出。 在第一和第二输出复制电路的节点之间提供用于检测共模电压差的电路,用于产生与共模电压差有关的电流。 连接电流镜电路以接收与共模电压差相关的电流,以控制差分输出级中的第一和第二电流路径中的电流。 用于检测第一和第二输出复制电路的节点之间的共模电压差的电路可以由仅感测共模电流的晶体管建立。 晶体管具有连接到输出复制电路中的节点的控制元件和到电源电压的电流路径。

    Current bias, current sense for magneto-resistive preamplifier,
preamplifying integrated circuit, and related methods
    5.
    发明授权
    Current bias, current sense for magneto-resistive preamplifier, preamplifying integrated circuit, and related methods 失效
    用于磁阻前置放大器的电流偏置,电流检测,前置放大集成电路及相关方法

    公开(公告)号:US06134060A

    公开(公告)日:2000-10-17

    申请号:US872809

    申请日:1997-06-10

    申请人: Marc H. Ryat

    发明人: Marc H. Ryat

    摘要: A current bias, current sense magneto-resistive preamplifier for a hard disk drive and related methods preferably includes an MR sensor responsive to a current bias for sensing a change in magnetic data flux and responsively providing a change in electrical resistance. A preamplifying circuit is preferably connected to the MR sensor for providing the current bias thereto and for amplifying a detected change in electrical resistance. The preamplifying circuit includes a sensor biasing circuit for providing the current bias to the MR sensor and an amplifying output circuit for providing an amplified output signal representative of the detected change in current bias to the MR sensor. The sensor biasing circuit preferably includes a current source, a first amplifying circuit connected to the MR sensor for sensing the change in electrical resistance therefrom, and a second amplifying circuit having a first input connected to the first amplifying circuit and a second input connected to the current source. The sensor biasing circuit also includes a transconductance amplifying circuit connected to first and second outputs of the second amplifying circuit and having an output connected to the first amplifying circuit for providing an output current proportional to the voltage difference at the first and second inputs thereof. The preamplifier further includes a capacitor connected to the preamplifying circuit for providing stability to at least a portion of the preamplifying circuit.

    摘要翻译: 用于硬盘驱动器的电流偏置电流感测磁阻前置放大器和相关方法优选地包括响应于电流偏压的MR传感器,用于感测磁数据通量的变化并且响应地提供电阻的变化。 优选地,前置放大电路连接到MR传感器以提供电流偏置,并用于放大检测到的电阻变化。 前置放大电路包括用于向MR传感器提供电流偏置的传感器偏置电路和用于向MR传感器提供表示检测到的电流偏置变化的放大输出信号的放大输出电路。 传感器偏置电路优选地包括电流源,连接到MR传感器的用于感测电阻变化的第一放大电路,以及具有连接到第一放大电路的第一输入端的第二放大电路和连接到第一放大电路的第二输入端 当前来源。 传感器偏置电路还包括连接到第二放大电路的第一和第二输出并具有连接到第一放大电路的输出的跨导放大电路,用于提供与其第一和第二输入处的电压差成比例的输出电流。 前置放大器还包括连接到前置放大电路的电容器,用于向前置放大电路的至少一部分提供稳定性。

    PTAT current source
    6.
    发明授权
    PTAT current source 失效
    PTAT电流源

    公开(公告)号:US5481180A

    公开(公告)日:1996-01-02

    申请号:US112807

    申请日:1993-08-27

    申请人: Marc H. Ryat

    发明人: Marc H. Ryat

    IPC分类号: G05F3/26 H03F3/343

    CPC分类号: G05F3/265 H03F3/343

    摘要: A PTAT current source has first and second current mirror circuits, each comprising a cascode transistor, an output transistor in series with the cascode transistor, and a base current compensating transistor having a control element connected to the cascode transistor on a side away from the output transistor, and a current flow path element connected to a current control element of the output transistor, the cascode transistors of the first and second current mirror circuits having differently sized emitter areas. A resistor is connected between the cascode transistors of the first and second current mirror circuits across which a differential current is developed. An output circuit develops a current in the output transistor of the second current mirror circuit. In one embodiment, a third mirror circuit is provided, to cancel a portion of an emitter current flowing in the output transistor of the second current mirror circuit.

    摘要翻译: PTAT电流源具有第一和第二电流镜电路,每个包括共源共栅晶体管,与共源共栅晶体管串联的输出晶体管和基极电流补偿晶体管,其具有在远离输出的一侧连接到共源共栅晶体管的控制元件 晶体管和连接到输出晶体管的电流控制元件的电流流路元件,第一和第二电流镜电路的共源共栅晶体管具有不同尺寸的发射极区域。 在第一和第二电流镜电路的共源共栅晶体管之间连接一个电阻器,在该电路上形成差分电流。 输出电路在第二电流镜电路的输出晶体管中形成电流。 在一个实施例中,提供第三反射镜电路,以抵消在第二电流镜电路的输出晶体管中流动的发射极电流的一部分。

    Power amplifier having high output voltage swing and high output drive
current
    7.
    发明授权
    Power amplifier having high output voltage swing and high output drive current 失效
    功率放大器具有高输出电压摆幅和高输出驱动电流

    公开(公告)号:US5389894A

    公开(公告)日:1995-02-14

    申请号:US940076

    申请日:1992-09-03

    申请人: Marc H. Ryat

    发明人: Marc H. Ryat

    IPC分类号: H03F1/32 H03F3/30 H03F3/45

    摘要: A power amplifier has a signal input stage to which an input signal is applied to produce an input stage output. An input signal amplifier is connected to receive the input signal to produce an amplified input signal from an active device at an output of the input signal amplifier. A push-pull signal output stage has first and second transistors. The first transistor has a current path connected between a supply voltage and an output node, and the second transistor has a current path connected between a reference voltage and the output node. The amplifier output provides variable drive current directly to a base of the first transistor, thereby enabling increased drive current to be realized. The power amplifier also includes a common mode biasing circuit connected to bias the first and second transistors for class AB operation, and the input stage output provides a signal base drive current to the first transistor separate from the common mode biasing circuit. This further increases the drive current that can be supplied to the base of the first transistor. By virtue of the direct connection of the current path of the first transistor between the supply voltage and the output node, and its base connection to the output of the input signal amplifier, the voltage on the base of the first transistor is enabled to swing to within 1V.sub.ce SAT from the supply voltage.

    摘要翻译: 功率放大器具有施加输入信号以产生输入级输出的信号输入级。 连接输入信号放大器以接收输入信号,以在输入信号放大器的输出处产生来自有源器件的放大输入信号。 推挽信号输出级具有第一和第二晶体管。 第一晶体管具有连接在电源电压和输出节点之间的电流路径,并且第二晶体管具有连接在参考电压和输出节点之间的电流路径。 放大器输出将可变驱动电流直接提供给第一晶体管的基极,从而实现增加的驱动电流。 该功率放大器还包括一个共模偏置电路,该共模偏置电路连接以偏置第一和第二晶体管用于AB类操作,并且输入级输出提供与共模偏置电路分离的第一晶体管的信号基极驱动电流。 这进一步增加了可以提供给第一晶体管的基极的驱动电流。 由于第一晶体管的电流路径在电源电压和输出节点之间的直接连接及其与输入信号放大器的输出端的基极连接,第一晶体管的基极上的电压能够摆动到 在1Vce SAT内的电源电压。

    Current mirror circuit
    8.
    发明授权
    Current mirror circuit 失效
    电流镜电路

    公开(公告)号:US5341109A

    公开(公告)日:1994-08-23

    申请号:US665

    申请日:1993-01-05

    申请人: Marc H. Ryat

    发明人: Marc H. Ryat

    IPC分类号: G05F3/26 H03F3/04

    CPC分类号: G05F3/265

    摘要: A transistor circuit is provided which generates a collector current through an output transistor which is equal to the base current of a selected transistor in the circuit. This generated base current can be utilized in a variety of applications. Once such application is its use in an accurate cascode current mirror having an output current which is a predetermined multiple of an input current.

    摘要翻译: 提供晶体管电路,其产生通过输出晶体管的集电极电流,其等于电路中所选择的晶体管的基极电流。 这种产生的基极电流可以用于各种应用中。 一旦这样的应用被用于准确的共源共栅电流反射镜,其输出电流是输入电流的预定倍数。

    HCM based transconductor circuits

    公开(公告)号:US5498953A

    公开(公告)日:1996-03-12

    申请号:US160579

    申请日:1993-11-30

    申请人: Marc H. Ryat

    发明人: Marc H. Ryat

    IPC分类号: G05F3/26 H03F3/343

    摘要: A transconductor circuit has first and second half cascode mirror circuits. Each half cascode mirror circuit has a cascode transistor, an active transistor, a base current compensating transistor, and a current source connected at one side to a supply voltage and at another side to the cascode transistor. The cascode and active transistors are connected in series between the current source and a first reference potential node. The base current compensating transistor is connected between the supply voltage and the base of the active transistor, and has its base connected between the current source and the cascode transistor. The bases of the cascode transistors of the first and second half cascode mirror circuits are connected to a second reference potential. First and second output mirror circuits are connected to mirror a current in a respective active transistor of the first and second half cascode mirror circuits. When a balanced input voltage is applied to respective voltage input nodes between the cascode and active transistors, corresponding balanced output currents are produced by the first and second output mirror circuits. In floating implementation, a biasing current source is connected between the first reference potential node and ground, and a biasing circuit connected to reference the second reference potential to a potential on the first reference potential node. Since the circuit may be made entirely of NPN transistors, it can run much faster than if PNP transistors were employed. Since the circuit is operated as a "quasi open-loop" circuit, the speed of operation is also enhanced. The circuit can be operated in class AB operation, if desired, or, if desired, in a class B--like mode of operation. Additionally, the output current is independent of the .beta. of the transistors, and the circuit can sink current to the physical limits of the active transistor components, thus enabling a high dynamic range of operation.

    Resistor ratioed current multiplier/divider
    10.
    发明授权
    Resistor ratioed current multiplier/divider 失效
    电阻比例电流倍增器/分频器

    公开(公告)号:US5459430A

    公开(公告)日:1995-10-17

    申请号:US189102

    申请日:1994-01-31

    申请人: Marc H. Ryat

    发明人: Marc H. Ryat

    IPC分类号: G05F3/30 G05F3/02

    CPC分类号: G05F3/30

    摘要: A wideband current multiplying divider circuit that produces an output current of any ratio to the input current has a first bipolar transistor and a first reference current source connected in series between a supply voltage and ground. A second bipolar transistor and a second reference current source are also connected in series between the supply voltage and around. A summation current source is connected at one side to ground and at the other side to a divided current path. A first resistor is connected in series with the station current source between a base of the first bipolar transistor and ground, and through which an input current can be connected to flow. A second resistor is connected in series with the summation current source between a base of the second bipolar transistor and ground, and through which an output current can be connected to flow. The ratio of the input to output currents is determined by the ratio of the first and second resistors, wherein the output current can be a multiplied or divided value of the input current. The first and second bipolar transistors are NPN transistors, and the first and second reference current sources source substantially equal reference currents. The circuit may further include a cascode circuit connected to substantially remove any Early effect error between the first and second bipolar transistors.

    摘要翻译: 产生与输入电流的任何比率的输出电流的宽带电流分配器电路具有在电源电压和地之间串联连接的第一双极晶体管和第一参考电流源。 第二双极晶体管和第二参考电流源也在电源电压和周围串联连接。 求和电流源在一侧连接到地,另一侧连接到分开的电流路径。 第一电阻器与站电流源串联在第一双极晶体管的基极和地之间,并且输入电流可以通过该第一电阻连接到流。 第二电阻器与第二双极晶体管的基极和地之间的求和电流源串联连接,通过该第二电阻可以连接输出电流。 输入电流与输出电流的比值由第一和第二电阻器的比率确定,其中输出电流可以是输入电流的相乘或除数。 第一和第二双极晶体管是NPN晶体管,并且第一和第二参考电流源源极大致相等的参考电流。 该电路还可包括共源共栅电路,其连接以基本上消除第一和第二双极晶体管之间的任何早期效应误差。