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    OPTIMIZED WRITE ALLOCATION FOR TWO-LEVEL MEMORY
    1.
    发明申请
    OPTIMIZED WRITE ALLOCATION FOR TWO-LEVEL MEMORY 审中-公开
    两级记忆的优化写入分配

    公开(公告)号：US20150178203A1

    公开(公告)日：2015-06-25

    申请号：US14140256

    申请日：2013-12-24

    申请人： Marc Torrant ,  Jorge E. Parra ,  Blaise Fanning ,  Joydeep Ray

    发明人： Marc Torrant ,  Jorge E. Parra ,  Blaise Fanning ,  Joydeep Ray

    IPC分类号： G06F12/08

    CPC分类号： G06F12/0811 ,  G06F12/123

    摘要： Systems and methods for write allocation by a two-level memory controller. An example processing system comprises: a processing core; a memory controller communicatively coupled to the processing core; and a system memory communicatively coupled to the memory controller, the system memory comprising a first level memory and a second level memory; wherein the memory controller is configured, responsive to determining that a memory block referenced by a memory write request is not present in the first level memory, to allocate a new first level memory block without retrieving the memory block referenced by the request from the second level memory, wherein the memory write request is represented by an overwrite type memory write request.

    摘要翻译： 由两级内存控制器进行写入分配的系统和方法。 一个示例处理系统包括：处理核心; 通信地耦合到所述处理核心的存储器控​​制器; 以及系统存储器，其通信地耦合到所述存储器控制器，所述系统存储器包括第一级存储器和第二级存储器; 其中，所述存储器控制器被配置为响应于确定由所述存储器写请求引用的存储器块不存在于所述第一级存储器中，以分配新的第一级存储器块而不从所述第二级检索由所述请求引用的所述存储器块 存储器，其中存储器写入请求由覆盖型存储器写入请求表示。

    ISOCHRONOUS AGENT DATA PINNING IN A MULTI-LEVEL MEMORY SYSTEM
    2.
    发明申请
    ISOCHRONOUS AGENT DATA PINNING IN A MULTI-LEVEL MEMORY SYSTEM 有权
    在多级存储器系统中的异步代理数据引导

    公开(公告)号：US20150169439A1

    公开(公告)日：2015-06-18

    申请号：US14133097

    申请日：2013-12-18

    申请人： Marc Torrant ,  David Puffer ,  Blaise Fanning ,  Bryan White ,  Joydeep Ray ,  Neil Schaper ,  Todd Witter ,  Altug Koker ,  Aditya Sreenivas

    发明人： Marc Torrant ,  David Puffer ,  Blaise Fanning ,  Bryan White ,  Joydeep Ray ,  Neil Schaper ,  Todd Witter ,  Altug Koker ,  Aditya Sreenivas

    IPC分类号： G06F12/02 ,  G06F12/08 ,  G06F12/10

    CPC分类号： G06F12/126

    摘要： A processing device comprises an instruction execution unit, a memory agent and pinning logic to pin memory pages in a multi-level memory system upon request by the memory agent. The pinning logic includes an agent interface module to receive, from the memory agent, a pin request indicating a first memory page in the multi-level memory system, the multi-level memory system comprising a near memory and a far memory. The pinning logic further includes a memory interface module to retrieve the first memory page from the far memory and write the first memory page to the near memory. In addition, the pinning logic also includes a descriptor table management module to mark the first memory page as pinned in the near memory, wherein marking the first memory page as pinned comprises setting a pinning bit corresponding to the first memory page in a cache descriptor table and to prevent the first memory page from being evicted from the near memory when the first memory page is marked as pinned.

    摘要翻译： 处理设备包括指令执行单元，存储器代理和钉住逻辑，以在存储器请求时针对多级存储器系统中的存储器页面进行引脚。 钉扎逻辑包括代理接口模块，用于从存储器代理接收指示多级存储器系统中的第一存储器页的引脚请求，所述多级存储器系统包括近存储器和远存储器。 钉扎逻辑还包括存储器接口模块，用于从远端存储器检索第一存储器页面，并将第一存储器页面写入近端存储器。 此外，钉扎逻辑还包括描述符表管理模块，用于将第一存储器页标记为固定在近存储器中，其中将第一存储器页标记为固定包括将对应于第一存储器页的锁存位设置在高速缓存描述符表中 并且当第一存储器页面被标记为被固定时，防止第一存储器页被从近存储器逐出。

    Remapping memory devices during operation
    10.
    发明授权
    Remapping memory devices during operation 有权
    操作期间重映射存储器件

    公开(公告)号：US06816986B1

    公开(公告)日：2004-11-09

    申请号：US09473483

    申请日：1999-12-28

    申请人： Blaise Fanning

    发明人： Blaise Fanning

    IPC分类号： H02H305

    CPC分类号： G06F11/1666 ,  G06F11/1658 ,  G06F11/20 ,  G11C29/76

    摘要： According to the invention, systems, apparatus and methods are disclosed for automatically replacing semiconductor based memory in a system while that system is operating. Replacement is accomplished by blocking access to the memory devices to be swapped, copying the contents of the faulty device to the replacement device, swapping the IDs of the two devices, and re-enabling access to the replaced device. This replacement is triggered by interrupts from the error detection logic. After replacement, the system automatically checks the faulty device to determine its suitability for use as a spare in the future. The determination is made by repeatedly writing and reading a pseudo-random pattern into the device and logging any errors.

    摘要翻译： 根据本发明，公开了系统，装置和方法，用于在系统运行时自动替换系统中的半导体存储器。 替换是通过阻止访问要交换的存储设备，将故障设备的内容复制到替换设备，交换两个设备的ID，以及重新启用对更换的设备的访问来实现的。 该更换由错误检测逻辑的中断触发。 更换后，系统会自动检查故障设备，以确定其将来适合作为备用设备使用。 通过重复写入和读取伪随机模式到设备中并记录任何错误来进行确定。