公开(公告)号：US07706644B2

公开(公告)日：2010-04-27

申请号：US12218367

申请日：2008-07-15

申请人： Mark Webster ,  Prakash Gothoskar ,  Vipulkumar Patel ,  David Piede

发明人： Mark Webster ,  Prakash Gothoskar ,  Vipulkumar Patel ,  David Piede

IPC分类号： G02B6/26

CPC分类号： G02B6/30 ,  G02B6/3598 ,  G02B6/3636 ,  G02B6/3652 ,  G02B6/3692 ,  G02B6/4249

摘要： One or more nanotaper coupling waveguides formed within an optical substrate allows for straightforward, reproducible offset launch conditions to be achieved between an incoming signal and the core region of a multimode fiber (which may be disposed along an alignment fixture formed in the optical substrate), fiber array or other multimode waveguiding structure. Offset launching of a single mode signal into a multimode fiber couples the signal into favorable spatial modes which reduce the presence of differential mode dispersion along the fiber. This approach to providing single mode signal coupling into legacy multimode fiber is considered to be an improvement over the prior art which required the use of an interface element between a single mode fiber and multimode fiber, limiting the number of propagating signals and applications for the legacy multimode fiber. An optical switch may be used to select the specific nanotaper(s) for coupling into the multimode fiber.

摘要翻译： 形成在光学衬底内的一个或多个纳米锥耦合波导允许在多模光纤（其可以沿着形成在光学衬底中的对准夹具设置）的入射信号和芯区域之间实现简单，可再现的偏移发射条件， 光纤阵列或其他多模波导结构。 偏移将单模信号发射到多模光纤中将信号耦合到有利的空间模式，这降低了沿着光纤的差分色散的存在。 将单模信号耦合提供给传统多模光纤的这种方法被认为是对需要使用单模光纤和多模光纤之间的接口元件的现有技术的改进，限制了传播信号的数量和遗留的应用 多模光纤 可以使用光学开关来选择用于耦合到多模光纤的特定纳米锥。

公开(公告)号：US20110222812A1

公开(公告)日：2011-09-15

申请号：US13029342

申请日：2011-02-17

申请人： Mark Webster ,  Vipulkumar Patel ,  Prakash Gothoskar ,  David Piede

发明人： Mark Webster ,  Vipulkumar Patel ,  Prakash Gothoskar ,  David Piede

IPC分类号： G02F1/01

CPC分类号： G02B6/12 ,  G02B6/26 ,  G02B26/00 ,  G02F1/025

摘要： A high speed silicon-based optical modulator with control of the dopant profiles in the body and gate regions of the device reduces the series resistance of the structure without incurring substantial optical power loss. That is, the use of increased dopant values in areas beyond the active region will allow for the series resistance to be reduced (and thus increase the modulating speed of the device) without incurring too large a penalty in signal loss. The dopant profiles within the gate and body regions are tailored to exhibit an intermediate value between the high dopant concentration in the contact areas and the low dopant concentration in the carrier integration window area.

摘要翻译： 具有控制器件的主体和栅极区域中的掺杂剂分布的高速硅基光学调制器降低了结构的串联电阻而不会引起实质的光功率损耗。 也就是说，在有源区域之外的区域中使用增加的掺杂剂值将允许降低串联电阻（从而增加器件的调制速度），而不会在信号损失中造成太大的惩罚。 调整栅极和体区内的掺杂剂分布，以显示接触区域中的高掺杂剂浓度与载流子集成窗口区域中的低掺杂剂浓度之间的中间值。

公开(公告)号：US20090103850A1

公开(公告)日：2009-04-23

申请号：US12287366

申请日：2008-10-08

申请人： Kaipendu Shastri ,  Prakash Gothoskar ,  Vipulkumar Patel ,  David Piede ,  Mark Webster

发明人： Kaipendu Shastri ,  Prakash Gothoskar ,  Vipulkumar Patel ,  David Piede ,  Mark Webster

IPC分类号： G02F1/035

CPC分类号： G02F1/0121 ,  G02F1/2255 ,  G02F1/2257 ,  G02F2001/0152

摘要： A silicon-insulator-silicon capacitive (SISCAP) optical modulator is configured to provide analog operation for applications which previously required the use of relatively large, power-consuming and expensive lithium niobate devices. An MZI-based SISCAP modulator (preferably a balanced arrangement with a SISCAP device on each arm) is responsive to an incoming high frequency electrical signal and is biased in a region where the capacitance of the device is essentially constant and the transform function of the MZI is linear.

摘要翻译： 硅 - 绝缘体 - 硅电容（SISCAP）光调制器被配置为为先前需要使用相对较大，耗电和昂贵的铌酸锂器件的应用提供模拟操作。 基于MZI的SISCAP调制器（优选地，在每个臂上具有SISCAP器件的平衡布置）响应于输入的高频电信号，并且被偏置在器件的电容基本上恒定的区域中，并且MZI的变换函数 是线性的

公开(公告)号：US20090162013A1

公开(公告)日：2009-06-25

申请号：US12316540

申请日：2008-12-11

申请人： Mark Webster ,  Vipulkumar Patel ,  Mary Nadeau ,  Prakash Gothoskar ,  David Piede

发明人： Mark Webster ,  Vipulkumar Patel ,  Mary Nadeau ,  Prakash Gothoskar ,  David Piede

IPC分类号： G02B6/42

CPC分类号： G02B6/32 ,  G02B6/305 ,  G02B6/327

摘要： A plasma-based etching process is used to specifically shape the endface of an optical substrate supporting an optical waveguide into a contoured facet which will improve coupling efficiency between the waveguide and a free space optical signal. The ability to use standard photolithographic techniques to pattern and etch the optical endface facet allows for virtually any desired facet geometry to be formed—and replicated across the surface of a wafer for the entire group of assemblies being fabricated. A lens may be etched into the endface using a properly-defined photolithographic mask, with the focal point of the lens selected with respect to the parameters of the optical waveguide and the propagating free space signal. Alternatively, an angled facet may be formed along the endface, with the angle sufficient to re-direct reflected/scattered signals away from the optical axis.

摘要翻译： 使用基于等离子体的蚀刻工艺来将支撑光波导的光学基板的端面特别地成形为轮廓刻面，这将提高波导与自由空间光信号之间的耦合效率。 使用标准光刻技术对光学端面小平面进行图案化和刻蚀的能力允许形成任何所需的刻面几何形状，并跨越制造的整组组件在晶片的表面上复制。 可以使用适当限定的光刻掩模将透镜蚀刻到端面中，相对于光波导的参数和传播的自由空间信号选择透镜的焦点。 或者，可以沿着端面形成成角度的小面，其角度足以将反射/散射信号重新引导远离光轴。

公开(公告)号：US08121450B2

公开(公告)日：2012-02-21

申请号：US12316540

申请日：2008-12-11

申请人： Mark Webster ,  Vipulkumar Patel ,  Mary Nadeau ,  Prakash Gothoskar ,  David Piede

发明人： Mark Webster ,  Vipulkumar Patel ,  Mary Nadeau ,  Prakash Gothoskar ,  David Piede

IPC分类号： G02B6/32 ,  G02B6/26 ,  G02B6/42

CPC分类号： G02B6/32 ,  G02B6/305 ,  G02B6/327

摘要： A plasma-based etching process is used to specifically shape the endface of an optical substrate supporting an optical waveguide into a contoured facet which will improve coupling efficiency between the waveguide and a free space optical signal. The ability to use standard photolithographic techniques to pattern and etch the optical endface facet allows for virtually any desired facet geometry to be formed—and replicated across the surface of a wafer for the entire group of assemblies being fabricated. A lens may be etched into the endface using a properly-defined photolithographic mask, with the focal point of the lens selected with respect to the parameters of the optical waveguide and the propagating free space signal. Alternatively, an angled facet may be formed along the endface, with the angle sufficient to re-direct reflected/scattered signals away from the optical axis.

摘要翻译： 使用基于等离子体的蚀刻工艺来将支撑光波导的光学基板的端面特别地成形为轮廓刻面，这将提高波导与自由空间光信号之间的耦合效率。 使用标准光刻技术对光学端面小平面进行图案化和刻蚀的能力允许形成任何所需的刻面几何形状，并跨越制造的整组组件在晶片的表面上复制。 可以使用适当限定的光刻掩模将透镜蚀刻到端面中，相对于光波导的参数和传播的自由空间信号选择透镜的焦点。 或者，可以沿着端面形成成角度的小面，其角度足以将反射/散射信号重新引导远离光轴。

公开(公告)号：US07657130B2

公开(公告)日：2010-02-02

申请号：US12287366

申请日：2008-10-08

申请人： Kalpendu Shastri ,  Prakash Gothoskar ,  Vipulkumar Patel ,  David Piede ,  Mark Webster

发明人： Kalpendu Shastri ,  Prakash Gothoskar ,  Vipulkumar Patel ,  David Piede ,  Mark Webster

IPC分类号： G02F1/035 ,  G02F1/01 ,  G02B6/12

CPC分类号： G02F1/0121 ,  G02F1/2255 ,  G02F1/2257 ,  G02F2001/0152

摘要： A silicon-insulator-silicon capacitive (SISCAP) optical modulator is configured to provide analog operation for applications which previously required the use of relatively large, power-consuming and expensive lithium niobate devices. An MZI-based SISCAP modulator (preferably a balanced arrangement with a SISCAP device on each arm) is responsive to an incoming high frequency electrical signal and is biased in a region where the capacitance of the device is essentially constant and the transform function of the MZI is linear.

摘要翻译： 硅 - 绝缘体 - 硅电容（SISCAP）光调制器被配置为为先前需要使用相对较大，耗电和昂贵的铌酸锂器件的应用提供模拟操作。 基于MZI的SISCAP调制器（优选地，在每个臂上具有SISCAP器件的平衡布置）响应于输入的高频电信号，并且被偏置在器件的电容基本上恒定的区域中，并且MZI的变换函数 是线性的

公开(公告)号：US20090123114A1

公开(公告)日：2009-05-14

申请号：US12218367

申请日：2008-07-15

申请人： Mark Webster ,  Prakash Gothoskar ,  Vipulkumar Patel ,  David Piede

发明人： Mark Webster ,  Prakash Gothoskar ,  Vipulkumar Patel ,  David Piede

IPC分类号： G02B6/35

CPC分类号： G02B6/30 ,  G02B6/3598 ,  G02B6/3636 ,  G02B6/3652 ,  G02B6/3692 ,  G02B6/4249

摘要： One or more nanotaper coupling waveguides formed within an optical substrate allows for straightforward, reproducible offset launch conditions to be achieved between an incoming signal and the core region of a multimode fiber (which may be disposed along an alignment fixture formed in the optical substrate), fiber array or other multimode waveguiding structure. Offset launching of a single mode signal into a multimode fiber couples the signal into favorable spatial modes which reduce the presence of differential mode dispersion along the fiber. This approach to providing single mode signal coupling into legacy multimode fiber is considered to be an improvement over the prior art which required the use of an interface element between a single mode fiber and multimode fiber, limiting the number of propagating signals and applications for the legacy multimode fiber. An optical switch may be used to select the specific nanotaper(s) for coupling into the multimode fiber.

摘要翻译： 形成在光学衬底内的一个或多个纳米锥耦合波导允许在多模光纤（其可以沿着形成在光学衬底中的对准夹具设置）的入射信号和芯区域之间实现简单，可再现的偏移发射条件， 光纤阵列或其他多模波导结构。 偏移将单模信号发射到多模光纤中将信号耦合到有利的空间模式，这降低了沿着光纤的差分色散的存在。 将单模信号耦合提供给传统多模光纤的这种方法被认为是对需要使用单模光纤和多模光纤之间的接口元件的现有技术的改进，限制了传播信号的数量和遗留的应用 多模光纤 可以使用光学开关来选择用于耦合到多模光纤的特定纳米锥。

公开(公告)号：US08363986B2

公开(公告)日：2013-01-29

申请号：US13029342

申请日：2011-02-17

申请人： Mark Webster ,  Vipulkumar Patel ,  Prakash Gothoskar ,  David Piede

发明人： Mark Webster ,  Vipulkumar Patel ,  Prakash Gothoskar ,  David Piede

IPC分类号： G02F1/035 ,  G02F1/01 ,  G02B6/26 ,  G02B6/42

CPC分类号： G02B6/12 ,  G02B6/26 ,  G02B26/00 ,  G02F1/025

摘要： A high speed silicon-based optical modulator with control of the dopant profiles in the body and gate regions of the device reduces the series resistance of the structure without incurring substantial optical power loss. That is, the use of increased dopant values in areas beyond the active region will allow for the series resistance to be reduced (and thus increase the modulating speed of the device) without incurring too large a penalty in signal loss. The dopant profiles within the gate and body regions are tailored to exhibit an intermediate value between the high dopant concentration in the contact areas and the low dopant concentration in the carrier integration window area.

摘要翻译： 具有控制器件的主体和栅极区域中的掺杂剂分布的高速硅基光学调制器降低了结构的串联电阻而不会引起实质的光功率损耗。 也就是说，在有源区域之外的区域中使用增加的掺杂剂值将允许降低串联电阻（从而增加器件的调制速度），而不会在信号损失中造成太大的惩罚。 调整栅极和体区内的掺杂剂分布，以显示接触区域中的高掺杂剂浓度与载流子集成窗口区域中的低掺杂剂浓度之间的中间值。

公开(公告)号：US20050194990A1

公开(公告)日：2005-09-08

申请号：US11075430

申请日：2005-03-08

申请人： Prakash Gothoskar ,  Margaret Ghiron ,  Robert Montgomery ,  Vipulkumar Patel ,  Kalpendu Shastri ,  Soham Pathak ,  David Piede ,  Katherine Yanushefski

发明人： Prakash Gothoskar ,  Margaret Ghiron ,  Robert Montgomery ,  Vipulkumar Patel ,  Kalpendu Shastri ,  Soham Pathak ,  David Piede ,  Katherine Yanushefski

IPC分类号： G01R31/26

CPC分类号： G02B6/30 ,  G02B6/34 ,  G02B2006/12107

摘要： A wafer-level testing arrangement for opto-electronic devices formed in a silicon-on-insulator (SOI) wafer structure utilizes a single opto-electronic testing element to perform both optical and electrical testing. Beam steering optics may be formed on the testing element and used to facilitate the coupling between optical probe signals and optical coupling elements (e.g., prism couplers, gratings) formed on the top surface of the SOI structure. The optical test signals are thereafter directed into optical waveguides formed in the top layer of the SOI structure. The opto-electronic testing element also comprises a plurality of electrical test pins that are positioned to contact a plurality of bondpad test sites on the opto-electronic device and perform electrical testing operations. The optical test signal results may be converted into electrical representations within the SOI structure and thus returned to the testing element as electrical signals.

摘要翻译： 用于在绝缘体上硅（SOI）晶片结构中形成的光电器件的晶片级测试装置利用单个光电测试元件执行光学和电学测试。 光束转向光学元件可以形成在测试元件上，并且用于促进光学探针信号与形成在SOI结构的顶表面上的光耦合元件（例如，棱镜耦合器，光栅）之间的耦合。 此后，光学测试信号被引导到形成在SOI结构的顶层中的光波导中。 光电测试元件还包括多个电测试引脚，其被定位成接触光电器件上的多个接合焊盘测试点并执行电测试操作。 光学测试信号结果可以转换为SOI结构内的电气表示，并因此作为电信号返回到测试元件。

公开(公告)号：US20050135727A1

公开(公告)日：2005-06-23

申请号：US11013722

申请日：2004-12-16

申请人： David Piede ,  Margaret Ghiron ,  Prakash Gothoskar ,  Robert Montgomery ,  Vipulkumar Patel ,  Kalpendu Shastri ,  Soham Pathak ,  Katherine Yanushefski

发明人： David Piede ,  Margaret Ghiron ,  Prakash Gothoskar ,  Robert Montgomery ,  Vipulkumar Patel ,  Kalpendu Shastri ,  Soham Pathak ,  Katherine Yanushefski

IPC分类号： G02B6/42 ,  G02B6/12

CPC分类号： G02B6/4277 ,  G02B6/42 ,  G02B6/4246 ,  H01L2224/48091 ,  H01L2224/49175 ,  H01L2924/00014

摘要： An SOI-based opto-electronic structure includes various electronic components disposed with their associated optical components within a single SOI layer, forming a monolithic arrangement. EMI/EMC shielding is provided by forming a metallized outer layer on the surface of an external prism coupler that interfaces with the SOI layer, the metallized layer including transparent apertures to allow an optical signal to be coupled into and out of the SOI layer. The opposing surface of the prism coupler may also be coated with a metallic material to provide additional shielding. Further, metallic shielding plates may be formed on the SOI structure itself, overlying the locations of EMI-sensitive electronics. All of these metallic layers are ultimately coupled to an external ground plane to isolate the structure and provide the necessary shielding.

摘要翻译： 基于SOI的光电结构包括在单个SOI层内与其相关联的光学部件一起设置的各种电子部件，形成单片布置。 通过在与SOI层相接的外部棱镜耦合器的表面上形成金属化的外层来提供EMI / EMC屏蔽，金属化层包括透明的孔，以允许光信号耦合到SOI层中。 棱镜耦合器的相对表面也可以用金属材料涂覆以提供额外的屏蔽。 此外，金属屏蔽板可以形成在SOI结构本身上，覆盖EMI敏感电子器件的位置。 所有这些金属层最终被耦合到外部接地平面以隔离结构并提供必要的屏蔽。