公开(公告)号：US09177995B2

公开(公告)日：2015-11-03

申请号：US13591247

申请日：2012-08-22

申请人： Martin Gutsche ,  Franz Kreupl ,  Harald Seidl

发明人： Martin Gutsche ,  Franz Kreupl ,  Harald Seidl

IPC分类号： H01L27/10 ,  H01L27/24 ,  H01L21/285 ,  H01L27/108 ,  B82Y10/00 ,  H01L21/768 ,  H01L27/22

CPC分类号： H01L27/24 ,  B82Y10/00 ,  H01L21/28525 ,  H01L21/76834 ,  H01L21/76885 ,  H01L21/76889 ,  H01L27/10855 ,  H01L27/10888 ,  H01L27/228 ,  H01L2221/1094

摘要： The present invention relates to a method for producing a vertical interconnect structure, a memory device and an associated production method, in which case, after the formation of a contact region in a carrier substrate a catalyst is produced on the contact region and a free-standing electrically conductive nanoelement is subsequently formed between the catalyst and the contact region and embedded in a dielectric layer.

摘要翻译： 本发明涉及垂直互连结构的制造方法，存储装置及相关的制造方法，在这种情况下，在载体基板上形成接触区域之后，在接触区域上产生催化剂， 随后在催化剂和接触区域之间形成立体导电的纳米元素并嵌入电介质层。

公开(公告)号：US20050095780A1

公开(公告)日：2005-05-05

申请号：US10952371

申请日：2004-09-29

申请人： Martin Gutsche ,  Franz Kreupl

发明人： Martin Gutsche ,  Franz Kreupl

IPC分类号： H01L21/02 ,  H01L21/314 ,  H01L21/316 ,  H01L21/8242 ,  H01L21/8234

CPC分类号： H01L27/1087 ,  H01L21/3141 ,  H01L21/31645 ,  H01L28/91

摘要： A method for producing memory cells, in which an electrically conductive substrate is provided, a trench structure or cup structure with side walls and a base is formed in or on the substrate, a first insulation layer is deposited at the side walls, a capacitor material is deposited on the base, a nanostructure is grown starting from and electrically connected to the catalyst material deposited on the base, a second insulation layer is deposited on the nanostructure and on the base, and finally an electrically conductive layer is deposited as a counterelectrode on the first insulation layer and second insulation layer.

摘要翻译： 一种制造存储单元的方法，其中提供导电基底，在基底中或基底上形成具有侧壁和基底的沟槽结构或杯结构，在侧壁上沉积第一绝缘层，电容器材料 沉积在基底上，从沉积在基底上的催化剂材料开始生长和电连接纳米结构，在纳米结构和基底上沉积第二绝缘层，最后作为反电极沉积导电层 第一绝缘层和第二绝缘层。

公开(公告)号：US20070105333A1

公开(公告)日：2007-05-10

申请号：US11588769

申请日：2006-10-27

申请人： Martin Gutsche ,  Franz Kreupl ,  Harald Seidl

发明人： Martin Gutsche ,  Franz Kreupl ,  Harald Seidl

IPC分类号： H01L29/76 ,  H01L21/20

CPC分类号： H01L27/24 ,  B82Y10/00 ,  H01L21/28525 ,  H01L21/76834 ,  H01L21/76885 ,  H01L21/76889 ,  H01L27/10855 ,  H01L27/10888 ,  H01L27/228 ,  H01L2221/1094

摘要： The present invention relates to a method for producing a vertical interconnect structure, a memory device and an associated production method, in which case, after the formation of a contact region in a carrier substrate a catalyst is produced on the contact region and a free-standing electrically conductive nanoelement is subsequently formed between the catalyst and the contact region and embedded in a dielectric layer.

摘要翻译： 本发明涉及垂直互连结构的制造方法，存储装置及相关的制造方法，在这种情况下，在载体基板上形成接触区域之后，在接触区域上产生催化剂， 随后在催化剂和接触区域之间形成立体导电的纳米元素并嵌入电介质层。

公开(公告)号：US08298932B2

公开(公告)日：2012-10-30

申请号：US13167744

申请日：2011-06-24

申请人： Martin Gutsche ,  Franz Kreupl ,  Harald Seidl

发明人： Martin Gutsche ,  Franz Kreupl ,  Harald Seidl

IPC分类号： H01L21/4763

摘要： The present invention relates to a method for producing a vertical interconnect structure, a memory device and an associated production method, in which case, after the formation of a contact region in a carrier substrate a catalyst is produced on the contact region and a free-standing electrically conductive nanoelement is subsequently formed between the catalyst and the contact region and embedded in a dielectric layer.

公开(公告)号：US20110248234A1

公开(公告)日：2011-10-13

申请号：US13167744

申请日：2011-06-24

申请人： Martin Gutsche ,  Franz Kreupl ,  Harald Seidl

发明人： Martin Gutsche ,  Franz Kreupl ,  Harald Seidl

IPC分类号： H01L29/02 ,  H01L21/336 ,  H01L29/772

CPC分类号： H01L27/24 ,  B82Y10/00 ,  H01L21/28525 ,  H01L21/76834 ,  H01L21/76885 ,  H01L21/76889 ,  H01L27/10855 ,  H01L27/10888 ,  H01L27/228 ,  H01L2221/1094

摘要： The present invention relates to a method for producing a vertical interconnect structure, a memory device and an associated production method, in which case, after the formation of a contact region in a carrier substrate a catalyst is produced on the contact region and a free-standing electrically conductive nanoelement is subsequently formed between the catalyst and the contact region and embedded in a dielectric layer.

摘要翻译： 本发明涉及垂直互连结构的制造方法，存储器件及相关的制造方法，在这种情况下，在载体基板上形成接触区域之后，在接触区域上产生催化剂， 随后在催化剂和接触区域之间形成立体导电的纳米元素并嵌入电介质层。

公开(公告)号：US07998858B2

公开(公告)日：2011-08-16

申请号：US11588769

申请日：2006-10-27

申请人： Martin Gutsche ,  Franz Kreupl ,  Harald Seidl

发明人： Martin Gutsche ,  Franz Kreupl ,  Harald Seidl

IPC分类号： H01L21/4763

CPC分类号： H01L27/24 ,  B82Y10/00 ,  H01L21/28525 ,  H01L21/76834 ,  H01L21/76885 ,  H01L21/76889 ,  H01L27/10855 ,  H01L27/10888 ,  H01L27/228 ,  H01L2221/1094

摘要： The present invention relates to a method for producing a vertical interconnect structure, a memory device and an associated production method, in which case, after the formation of a contact region in a carrier substrate a catalyst is produced on the contact region and a free-standing electrically conductive nanoelement is subsequently formed between the catalyst and the contact region and embedded in a dielectric layer.

摘要翻译： 本发明涉及垂直互连结构的制造方法，存储装置及相关的制造方法，在这种情况下，在载体基板上形成接触区域之后，在接触区域上产生催化剂， 随后在催化剂和接触区域之间形成立体导电的纳米元素并嵌入电介质层。

公开(公告)号：US08420526B2

公开(公告)日：2013-04-16

申请号：US13167744

申请日：2011-06-24

申请人： Martin Gutsche ,  Franz Kreupl ,  Harald Seidl

发明人： Martin Gutsche ,  Franz Kreupl ,  Harald Seidl

IPC分类号： H01L21/4763

CPC分类号： H01L27/24 ,  B82Y10/00 ,  H01L21/28525 ,  H01L21/76834 ,  H01L21/76885 ,  H01L21/76889 ,  H01L27/10855 ,  H01L27/10888 ,  H01L27/228 ,  H01L2221/1094

摘要： The present invention relates to a method for producing a vertical interconnect structure, a memory device and an associated production method, in which case, after the formation of a contact region in a carrier substrate a catalyst is produced on the contact region and a free-standing electrically conductive nanoelement is subsequently formed between the catalyst and the contact region and embedded in a dielectric layer.

公开(公告)号：US20120305873A1

公开(公告)日：2012-12-06

申请号：US13591247

申请日：2012-08-22

申请人： Martin Gutsche ,  Franz Kreupl ,  Harald Seidl

发明人： Martin Gutsche ,  Franz Kreupl ,  Harald Seidl

IPC分类号： H01L45/00

CPC分类号： H01L27/24 ,  B82Y10/00 ,  H01L21/28525 ,  H01L21/76834 ,  H01L21/76885 ,  H01L21/76889 ,  H01L27/10855 ,  H01L27/10888 ,  H01L27/228 ,  H01L2221/1094

摘要： The present invention relates to a method for producing a vertical interconnect structure, a memory device and an associated production method, in which case, after the formation of a contact region in a carrier substrate a catalyst is produced on the contact region and a free-standing electrically conductive nanoelement is subsequently formed between the catalyst and the contact region and embedded in a dielectric layer.

摘要翻译： 本发明涉及垂直互连结构的制造方法，存储装置及相关的制造方法，在这种情况下，在载体基板上形成接触区域之后，在接触区域上产生催化剂， 随后在催化剂和接触区域之间形成立体导电的纳米元素并嵌入电介质层。

公开(公告)号：US20070012956A1

公开(公告)日：2007-01-18

申请号：US11182022

申请日：2005-07-14

申请人： Martin Gutsche ,  Harald Seidl ,  Franz Kreupl

发明人： Martin Gutsche ,  Harald Seidl ,  Franz Kreupl

IPC分类号： H01L29/768

CPC分类号： B82Y10/00 ,  G11C13/0004 ,  G11C13/025 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1273 ,  H01L45/144 ,  H01L45/148 ,  H01L45/16 ,  H01L45/1675 ,  H01L45/1683

摘要： A memory cell includes a first electrode comprising a nanowire, a second electrode, and phase-change material between the first electrode and the second electrode.

摘要翻译： 存储单元包括在第一电极和第二电极之间包括纳米线，第二电极和相变材料的第一电极。

公开(公告)号：US07081383B2

公开(公告)日：2006-07-25

申请号：US10952371

申请日：2004-09-29

申请人： Martin Gutsche ,  Franz Kreupl

发明人： Martin Gutsche ,  Franz Kreupl

IPC分类号： H01L21/8242 ,  H01L21/20

CPC分类号： H01L27/1087 ,  H01L21/3141 ,  H01L21/31645 ,  H01L28/91

摘要： A method for producing memory cells, in which an electrically conductive substrate is provided, a trench structure or cup structure with side walls and a base is formed in or on the substrate, a first insulation layer is deposited at the side walls, a capacitor material is deposited on the base, a nanostructure is grown starting from and electrically connected to the catalyst material deposited on the base, a second insulation layer is deposited on the nanostructure and on the base, and finally an electrically conductive layer is deposited as a counterelectrode on the first insulation layer and second insulation layer.

摘要翻译： 一种制造存储单元的方法，其中提供导电基底，在基底中或基底上形成具有侧壁和基底的沟槽结构或杯结构，在侧壁上沉积第一绝缘层，电容器材料 沉积在基底上，从沉积在基底上的催化剂材料开始生长和电连接纳米结构，在纳米结构和基底上沉积第二绝缘层，最后作为反电极沉积导电层 第一绝缘层和第二绝缘层。