公开(公告)号：US5240335A

公开(公告)日：1993-08-31

申请号：US825484

申请日：1992-01-24

申请人： Masahiro Itoh ,  Masayuki Kuwabara

发明人： Masahiro Itoh ,  Masayuki Kuwabara

IPC分类号： B41M5/382 ,  B41J3/32 ,  B41M3/16 ,  G03G9/08 ,  G03G15/16 ,  G03G15/22 ,  G09B21/02

CPC分类号： B41J3/32 ,  B41M3/16 ,  G03G15/04045 ,  G03G15/221 ,  G09B21/02

摘要： A braille printing apparatus utilizes non-impact printing technology to provide high-speed, high-volume production of printed braille materials. The document carrying the information to be printed in braille is scanned and read under the control of a computer. The computer outputs the object information in the form of control signals. In accordance with these control signals, a write head projects a beam of light to form a latent image on the charged surface of a rotating drum. Toner is used to develop the image and transfer it to paper, where it is fused. A coarse-grain toner is used, and is applied in a sufficient quantities thereby produce printed braille materials.

摘要翻译： 盲文打印设备利用非冲击打印技术提供高速，大批量生产印刷盲文材料。 携带打印在盲文中的信息的文件在计算机的控制下被扫描和读取。 计算机以控制信号的形式输出对象信息。 根据这些控制信号，写入头投影光束以在旋转鼓的带电表面上形成潜像。 碳粉用于开发图像并将其转印到纸上，在那里融合。 使用粗粒调色剂，并且以足够的量施加，从而产生印刷的盲文材料。

公开(公告)号：US5113232A

公开(公告)日：1992-05-12

申请号：US719406

申请日：1991-06-24

申请人： Masahiro Itoh ,  Masayuki Kuwabara

发明人： Masahiro Itoh ,  Masayuki Kuwabara

IPC分类号： H01L23/36 ,  H01L27/15 ,  H01L33/08 ,  H01L33/14 ,  H01L33/36

CPC分类号： H01L33/647 ,  H01L27/153 ,  H01L2924/0002

摘要： The present invention is directed to an LED array chip which includes a plurality of LEDs which are integrated thereon and has a thermal conductor on the array chip in the vicinity of, and on the same side as a light emitting surface of each LED on the array chip. The thermal conductor extends away from each LED and is connected to a radiating member such as a heat sink which is provided outside of the array chip. The thermal conductor can be electrically conductive, and in such case can be electrically connected to an electrode on a surface of the array chip opposite to the light emitting surfaces of the plurality of LEDs.

摘要翻译： 本发明涉及一种LED阵列芯片，其包括集成在其上的多个LED，并且阵列芯片上的阵列芯片上的热导体位于阵列上的每个LED的发光面的附近并且与其同一侧 芯片。 热导体远离每个LED延伸并且连接到散热构件，例如设置在阵列芯片外部的散热器。 热导体可以是导电的，并且在这种情况下可以电连接到与多个LED的发光表面相对的阵列芯片的表面上的电极。

公开(公告)号：US20120076396A1

公开(公告)日：2012-03-29

申请号：US13312460

申请日：2011-12-06

申请人： Kaoru SAKAI ,  Shunji Maeda ,  Takafumi Okabe ,  Hiroshi Goto ,  Masayuki Kuwabara ,  Naoya Takeuchi

发明人： Kaoru SAKAI ,  Shunji Maeda ,  Takafumi Okabe ,  Hiroshi Goto ,  Masayuki Kuwabara ,  Naoya Takeuchi

IPC分类号： G06K9/00

CPC分类号： G06T7/001 ,  G06T7/0002 ,  G06T7/32 ,  G06T7/33 ,  G06T2207/30148

摘要： A pattern inspection method and apparatus are provided for sequentially imaging plural chips formed on a substrate to be inspected to and obtaining inspection images and reference images, calculating a position gap between the inspection images and the reference images using a recipe created in advance by using another substrate of the same kind or type as the substrate, the recipe including information for determining which pattern sections are to be selected and discarded, aligning the inspection images and the reference images using information of the position gap from the calculating step, and comparing the inspection images with the reference images aligned by the aligning step and extracting a defect candidate.

摘要翻译： 提供了一种图案检查方法和装置，用于将形成在要检查的基板上的多个芯片顺序地成像并获得检查图像和参考图像，使用预先通过使用另一个来创建的食谱来计算检查图像与参考图像之间的位置间隙 与基板相同种类或类型的基板，所述配方包括用于确定要选择和丢弃哪些图案部分的信息，使用来自计算步骤的位置间隙的信息对准检查图像和参考图像，并且将检查 具有通过对准步骤对齐的参考图像并提取缺陷候选的图像。

公开(公告)号：US5760460A

公开(公告)日：1998-06-02

申请号：US48249

申请日：1993-04-19

申请人： Masayoshi Koike ,  Masayuki Kuwabara

发明人： Masayoshi Koike ,  Masayuki Kuwabara

IPC分类号： B41J2/45 ,  H01L27/15 ,  H01L33/08 ,  H01L33/12 ,  H01L33/30 ,  H01L33/40 ,  H01L33/44 ,  H01L29/06 ,  H01L23/58

CPC分类号： B41J2/45 ,  H01L27/153

摘要： An array of light-emitting diodes each having a junction between a region of a first conductivity type and a region of a second conductivity type. The array fabrication process offers the elimination of wafer breakage is eliminated and an array with stable optical output power.

摘要翻译： 每个发光二极管的阵列具有第一导电类型的区域和第二导电类型的区域之间的接合点。 阵列制造工艺提供了消除晶片断裂的消除和具有稳定的光输出功率的阵列。

公开(公告)号：US07711178B2

公开(公告)日：2010-05-04

申请号：US11869217

申请日：2007-10-09

申请人： Kaoru Sakai ,  Shunji Maeda ,  Takafumi Okabe ,  Hiroshi Goto ,  Masayuki Kuwabara ,  Naoya Takeuchi

发明人： Kaoru Sakai ,  Shunji Maeda ,  Takafumi Okabe ,  Hiroshi Goto ,  Masayuki Kuwabara ,  Naoya Takeuchi

IPC分类号： G06K9/00

CPC分类号： G06T7/001 ,  G06T7/0002 ,  G06T7/32 ,  G06T7/33 ,  G06T2207/30148

摘要： A pattern inspection method including: sequentially imaging plural chips formed on a substrate; selecting a pattern which is suitable for calculating position gap between an inspection image of a subject chip and reference image stored in memory from an image of a firstly imaged chip among said sequentially imaged plural chips formed on the substrate; computing position gap between an inspection image of a chip obtained by the sequential imaging and reference image stored in a memory by using a positional information of a pattern image included in the inspection image and a reference pattern image included in the reference image which are both corresponding to the pattern selected at the selecting; aligning the inspection image and the reference image by using information of the calculated position gap; and comparing the aligned inspection image with the reference image and extracting a difference as a defect candidate.

摘要翻译： 一种图案检查方法，包括：顺序成像形成在基板上的多个芯片; 从形成在所述基板上的所述顺序成像的多个芯片中，选择适合于计算被检体图像的检查图像与存储在存储器中的参考图像之间的位置间隔的图案， 通过使用包括在检查图像中的图案图像的位置信息和包括在参考图像中的参考图案图像来计算通过顺序成像获得的芯片的检查图像和存储在存储器中的参考图像之间的位置间隙， 到选择时选择的图案; 通过使用计算出的位置间隙的信息对准检查图像和参考图像; 并且将对准的检查图像与参考图像进行比较，并提取差异作为缺陷候选。

公开(公告)号：US06229331B1

公开(公告)日：2001-05-08

申请号：US09395264

申请日：1999-09-14

申请人： Masayuki Kuwabara

发明人： Masayuki Kuwabara

IPC分类号： G01R3126

CPC分类号： G01R31/311

摘要： An apparatus correctly detects critical defects in spaces between wiring patterns on semiconductor integrated devices. The apparatus picks up gray level images from semiconductor dies, sequentially reads the images strip by strip, each strip consisting of pixels aligned in a row or column direction, calculates an optimum grouping operator for the strip, divides the pixels into groups according to the grouping operators, sets thresholds for the groups, compares the thresholds with gray level differences between the gray level images, and detects defects on the semiconductor dies. Also provided is a method to achieve this technique.

摘要翻译： 一种装置正确地检测半导体集成器件上布线图案之间的空间中的关键缺陷 该装置从半导体管芯拾取灰度级图像，依次读取条带图像，每行由行或列方向对齐的像素组成，计算出条带的最佳分组算子，根据分组将像素分成组 操作员设置组的阈值，将阈值与灰度级图像之间的灰度级差进行比较，并检测半导体管芯上的缺陷。 还提供了一种实现该技术的方法。

公开(公告)号：US5189496A

公开(公告)日：1993-02-23

申请号：US809892

申请日：1991-12-18

申请人： Masayuki Kuwabara

发明人： Masayuki Kuwabara

IPC分类号： H01L33/08 ,  H01L33/10 ,  H01L33/14 ,  H01L33/30 ,  H01L33/38

CPC分类号： H01L33/0008

摘要： A surface emitting light-emitting diode has in a body of a semiconductor material a light-emitting p-n junction, a first electrode on a portion of one surface of the body and a second electrode on another surface of the body opposite the one surface. A current-block region is provided in the body under the first electrode and between the first electrode and the p-n junction. This suppresses light emission from beneath the first electrode and applies current injection only to regions where it is effective for producing surface emission so as to improve the emission efficiency of the diode.

摘要翻译： 表面发射发光二极管在半导体材料的主体中具有发光p-n结，在主体的一个表面的一部分上的第一电极和与该表面相对的另一个表面上的第二电极。 在第一电极下面和第一电极与p-n结之间的主体中设置电流块区域。 这抑制了从第一电极下方的发光，并且仅对其产生表面发射有效的区域施加电流注入，以便提高二极管的发射效率。

公开(公告)号：US20080031511A1

公开(公告)日：2008-02-07

申请号：US11869217

申请日：2007-10-09

申请人： Kaoru Sakai ,  Shunji Maeda ,  Takafumi Okabe ,  Hiroshi Goto ,  Masayuki Kuwabara ,  Naoya Takeuchi

发明人： Kaoru Sakai ,  Shunji Maeda ,  Takafumi Okabe ,  Hiroshi Goto ,  Masayuki Kuwabara ,  Naoya Takeuchi

IPC分类号： G06K9/00

CPC分类号： G06T7/001 ,  G06T7/0002 ,  G06T7/32 ,  G06T7/33 ,  G06T2207/30148

摘要： A pattern inspection method including: sequentially imaging plural chips formed on a substrate; selecting a pattern which is suitable for calculating position gap between an inspection image of a subject chip and reference image stored in memory from an image of a firstly imaged chip among said sequentially imaged plural chips formed on the substrate; computing position gap between an inspection image of a chip obtained by the sequential imaging and reference image stored in a memory by using a positional information of a pattern image included in the inspection image and a reference pattern image included in the reference image which are both corresponding to the pattern selected at the selecting; aligning the inspection image and the reference image by using information of the calculated position gap; and comparing the aligned inspection image with the reference image and extracting a difference as a defect candidate.

摘要翻译： 一种图案检查方法，包括：顺序成像形成在基板上的多个芯片; 从形成在所述基板上的所述顺序成像的多个芯片中，选择适合于计算被检体图像的检查图像与存储在存储器中的参考图像之间的位置间隔的图案， 通过使用包括在检查图像中的图案图像的位置信息和包括在参考图像中的参考图案图像来计算通过顺序成像获得的芯片的检查图像和存储在存储器中的参考图像之间的位置间隙， 到选择时选择的图案; 通过使用计算出的位置间隙的信息对准检查图像和参考图像; 并且将对准的检查图像与参考图像进行比较，并提取差异作为缺陷候选。

公开(公告)号：US06973208B2

公开(公告)日：2005-12-06

申请号：US09861084

申请日：2001-05-18

申请人： Masayuki Kuwabara

发明人： Masayuki Kuwabara

IPC分类号： G03F7/20 ,  G06T7/00 ,  G06K9/00

CPC分类号： G03F7/70508 ,  G03F7/70616 ,  G06T7/0002 ,  G06T7/001 ,  G06T2207/30148

摘要： Disclosed are a method and apparatus for inspection by pattern comparison enabling cell-cell comparison by software processing even when the array pitch R of the cells is not a whole multiple of the pixel pitch P, wherein provision is made of an imaging device for capturing an image of patterns having a plurality of basic patterns repeating at a predetermined pitch and generating pixel data, a memory for storing the image data, and an image processor unit for successively comparing corresponding pixel data of the basic patterns based on the pixel data, the image processor unit setting a first whole number by which the length of the predetermined pitch multiplied by the first whole number becomes a whole multiple of the pixel pitch when the predetermined pitch is expressed by a resolution of at least a predetermined resolution pitch smaller than the pixel pitch and successively comparing the corresponding pixel data of basic patterns said first whole number of pattern away.

摘要翻译： 公开了一种用于通过图案比较进行检查的方法和装置，即使当单元的阵列间距R不是像素间距P的整数倍时，通过软件处理实现细胞单元比较，其中提供用于捕获 具有以预定间距重复的多个基本图案并生成像素数据的图案的图像，用于存储图像数据的存储器和用于基于像素数据连续地比较基本图案的对应像素数据的图像处理器单元，图像 处理器单元设置第一整数，当预定音调由至少比像素间距小的预定分辨率间距的分辨率表示时，预定音高乘以第一整数的长度变为像素间距的整数倍 并连续地将所述第一整数图案的基本图案的相应像素数据进行比较。

公开(公告)号：US08090187B2

公开(公告)日：2012-01-03

申请号：US12725040

申请日：2010-03-16

申请人： Kaoru Sakai ,  Shunji Maeda ,  Takafumi Okabe ,  Hiroshi Goto ,  Masayuki Kuwabara ,  Naoya Takeuchi

发明人： Kaoru Sakai ,  Shunji Maeda ,  Takafumi Okabe ,  Hiroshi Goto ,  Masayuki Kuwabara ,  Naoya Takeuchi

IPC分类号： G06K9/00

CPC分类号： G06T7/001 ,  G06T7/0002 ,  G06T7/32 ,  G06T7/33 ,  G06T2207/30148

摘要： A pattern inspection method including: sequentially imaging plural chip formed on a substrate; selecting at least one of pattern sections of each inspection image obtained by the imaging, while discarding other pattern sections, based on a recipe created in advance, the recipe including information for determining which pattern sections to be selected or discarded; calculating position gap between an inspection image of a chip obtained by the imaging and a reference image stored in a memory by using positional information of pattern images included in the inspection image and reference pattern images which are both corresponding to the at least one of pattern sections selected at the selecting; aligning the inspection image and the reference image by using information of the calculated position gap; and comparing the aligned inspection image with the reference image, and extracting a difference between the two images as a defect candidate.

摘要翻译： 一种图案检查方法，包括：顺序成像形成在基板上的多个芯片; 选择通过成像获得的每个检查图像的图案部分中的至少一个，同时基于预先创建的食谱来丢弃其他图案部分，所述配方包括用于确定要选择或丢弃的图案部分的信息; 通过使用包括在检查图像中的图案图像的位置信息和对应于图案部分中的至少一个的参考图案图像来计算通过成像获得的芯片的检查图像与存储在存储器中的参考图像之间的位置间隙 选择选择; 通过使用计算出的位置间隙的信息对准检查图像和参考图像; 以及将对准的检查图像与参考图像进行比较，并且将两个图像之间的差提取为缺陷候选。