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公开(公告)号:US20100007541A1
公开(公告)日:2010-01-14
申请号:US12439444
申请日:2007-08-10
申请人: Masakazu Shigemori , Koji Sushihara , Kenji Murata
发明人: Masakazu Shigemori , Koji Sushihara , Kenji Murata
IPC分类号: H03M1/34
CPC分类号: H03M1/0624 , H03M1/206 , H03M1/365
摘要: The conventional A/D converter has a drawback that the conversion precision is degraded when the operation periods of the constituents of the A/D converter are shortened due to the duty ratio of an external input clock because the operation periods of the constituents of the A/D converter depend on the pulse width of the external input clock. However, a highly-precise A/D conversion operation independent of the duty ratio of the external input clock can be realized by providing a circuit for detecting the operation periods of the constituents of the A/D converter, and adjusting the duty ratio of the operation clock according to the detected operation periods of the constituents of the A/D converter.
摘要翻译: 传统的A / D转换器具有这样的缺点,即当A / D转换器的构成要素的操作周期由于外部输入时钟的占空比而缩短时,转换精度降低,因为A / D转换器取决于外部输入时钟的脉冲宽度。 然而,与外部输入时钟的占空比无关的高精度A / D转换操作可以通过提供用于检测A / D转换器的构成要素的操作周期的电路来实现,并且调整占空比 根据检测到的A / D转换器的构成要素的运行时间来设定运转时钟。
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公开(公告)号:US07834794B2
公开(公告)日:2010-11-16
申请号:US12439444
申请日:2007-08-10
申请人: Masakazu Shigemori , Koji Sushihara , Kenji Murata
发明人: Masakazu Shigemori , Koji Sushihara , Kenji Murata
IPC分类号: H03M1/12
CPC分类号: H03M1/0624 , H03M1/206 , H03M1/365
摘要: The conventional A/D converter has a drawback that the conversion precision is degraded when the operation periods of the constituents of the A/D converter are shortened due to the duty ratio of an external input clock because the operation periods of the constituents of the A/D converter depend on the pulse width of the external input clock. However, a highly-precise A/D conversion operation independent of the duty ratio of the external input clock can be realized by providing a circuit for detecting the operation periods of the constituents of the A/D converter, and adjusting the duty ratio of the operation clock according to the detected operation periods of the constituents of the A/D converter.
摘要翻译: 传统的A / D转换器具有这样的缺点,即当A / D转换器的构成要素的操作周期由于外部输入时钟的占空比而缩短时,转换精度降低,因为A / D转换器取决于外部输入时钟的脉冲宽度。 然而,与外部输入时钟的占空比无关的高精度A / D转换操作可以通过提供用于检测A / D转换器的构成要素的操作周期的电路来实现,并且调整占空比 根据检测到的A / D转换器的构成要素的运行时间来设定运转时钟。
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公开(公告)号:US20100013692A1
公开(公告)日:2010-01-21
申请号:US12377989
申请日:2007-08-10
IPC分类号: H03M1/34
CPC分类号: H03M1/1245 , H03M1/365
摘要: An external input operation clock signal is required for operating a conventional A/D converter, and the performance of the A/D converter is undesirably determined by the characteristics of the external input operation clock.A clock generator circuit (104) for automatically generating an operation clock is provided inside an A/D converter (100) to make the A/D converter require no external input operation clock. Further, a circuit for detecting the operation times of the constituents of the A/D converter is provided to generate a clock with which the A/D converter is optimally operated, thereby realizing high-speed operation and low power consumption.
摘要翻译: 操作常规A / D转换器需要外部输入操作时钟信号,并且A / D转换器的性能不合需要地由外部输入操作时钟的特性决定。 在A / D转换器(100)内部设置用于自动生成操作时钟的时钟发生器电路(104),使得A / D转换器不需要外部输入操作时钟。 此外,提供用于检测A / D转换器的组成部分的操作时间的电路,以产生A / D转换器被最佳操作的时钟,从而实现高速操作和低功耗。
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公开(公告)号:US07986256B2
公开(公告)日:2011-07-26
申请号:US12377989
申请日:2007-08-10
IPC分类号: H03M1/12
CPC分类号: H03M1/1245 , H03M1/365
摘要: An external input operation clock signal is required for operating a conventional A/D converter, and the performance of the A/D converter is undesirably determined by the characteristics of the external input operation clock. A clock generator circuit for automatically generating an operation clock is provided inside an A/D converter to make the A/D converter require no external input operation clock. Further, a circuit for detecting the operation times of the constituents of the A/D converter is provided to generate a clock with which the A/D converter is optimally operated, thereby realizing high-speed operation and low power consumption.
摘要翻译: 操作常规A / D转换器需要外部输入操作时钟信号,并且A / D转换器的性能不合需要地由外部输入操作时钟的特性决定。 在A / D转换器内部设置用于自动生成工作时钟的时钟发生器电路,使A / D转换器不需要外部输入操作时钟。 此外,提供用于检测A / D转换器的组成部分的操作时间的电路,以产生A / D转换器被最佳操作的时钟,从而实现高速操作和低功耗。
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公开(公告)号:USD599785S1
公开(公告)日:2009-09-08
申请号:US29296666
申请日:2007-10-25
申请人: Takeshi Matsuda , Kenji Hatano , Masaji Komuro , Kenji Murata
设计人: Takeshi Matsuda , Kenji Hatano , Masaji Komuro , Kenji Murata
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公开(公告)号:US06917856B2
公开(公告)日:2005-07-12
申请号:US10343913
申请日:2002-04-12
申请人: Kenji Murata
发明人: Kenji Murata
CPC分类号: B25J9/1674 , G05B2219/40218
摘要: It is constructed so as to detect a joint movement position of a robot arm by a position detector and a joint movement speed is calculated from change amounts of the joint movement position and elapsed time and is compared with an allowable movement speed and unlocking and locking of a brake are controlled so that the joint movement speed of an arm at the time of brake unlocking becomes within a constant value even when a shape, an attitude and a load condition of the robot arm vary. Therefore, movement work of the arm by the brake unlocking can be performed alone and a robot with high safety can be obtained.
摘要翻译: 其结构是通过位置检测器检测机器人手臂的关节运动位置,并且根据关节运动位置和经过时间的变化量计算关节运动速度,并将其与允许的运动速度进行比较并解锁和锁定 控制制动器,使得即使当机器人手臂的形状,姿态和负载条件变化时,制动器解锁时的臂的关节移动速度也变为恒定值。 因此,可以单独执行通过制动器解锁的臂的移动工作,并且可以获得具有高安全性的机器人。
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公开(公告)号:US06771784B2
公开(公告)日:2004-08-03
申请号:US09926319
申请日:2002-01-09
申请人: Kenji Murata
发明人: Kenji Murata
IPC分类号: H03G500
摘要: A sub woofer system is constituted of a real time digital signal processing part 5 that includes an A/D converter 5a, a low pass filter block 5b, a delay block 5c, and a D/A converter block 5d, an analog power amplifier 6 and a speaker 7. The length of delay time of the delay block 5c is set so that the length of group delay time of the digital signal processing part 5 may equal an integral multiple of the length of time corresponding to one wavelength of the crossover point frequency between the digital signal processing part 5 and a main speaker 4. The signal processing is performed under the conditions that have been set as such. In this case, a construction is made up wherein the length of a group delay time produced in the digital type real time digital signal processing part can be set to a given value. By this construction, it is possible to provide a sub woofer system which can improve the phase interference between the main speaker and the sub woofer system at the crossover point between the two.
摘要翻译: 低音扬声器系统由包括A / D转换器5a,低通滤波器块5b,延迟块5c和D / A转换器块5d的实时数字信号处理部分5构成,模拟功率放大器6 和扬声器7.延迟块5c的延迟时间的长度被设置为使得数字信号处理部分5的组延迟时间的长度可以等于与交叉点的一个波长相对应的时间长度的整数倍 在数字信号处理部分5和主扬声器4之间的频率。信号处理在已被设置为这样的条件下执行。 在这种情况下,构成了数字型实时数字信号处理部中产生的群延迟时间的长度可以设定为给定值的结构。 通过这种结构,可以提供一种可以在两者之间的交叉点改善主扬声器和次低音扬声器系统之间的相位干扰的次低音扬声器系统。
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公开(公告)号:US06667075B2
公开(公告)日:2003-12-23
申请号:US10110642
申请日:2002-04-12
申请人: Toshiaki Kitazoe , Keisuke Tanaka , Kenji Murata
发明人: Toshiaki Kitazoe , Keisuke Tanaka , Kenji Murata
IPC分类号: B05D310
CPC分类号: G02B1/18 , C03C17/245 , C03C17/3417 , C03C2217/213 , C03C2218/151 , C03C2218/152 , C03C2218/32 , C23C14/10 , C23C14/5853 , C23C16/0272 , C23C16/402 , C23C16/56 , G02B1/10
摘要: The present invention relates to a method for imparting hydrophilicity to a substrate whereby high hydrophilic properties and water-holding properties can be maintained for a long period of time. According to the present invention, an SiO2 film is formed directly or through an undercoat layer on a substrate under a reduced pressure of 100 Pa or less and immediately after the SiO2 film is formed, the SiO2 film is treated with water. Before forming the SiO2 film, it is also desirable that an undercoat layer consisting of a TiO2 film, Al2O3 film, Nb2O5 film, a laminated film prepared by laminating the TiO2 film on the Al2O3 film, a laminated film prepared by laminating the TiO2 film on the Nb2O5 film, or a low emissivity film be formed on a substrate and the SiO2 film be then formed on the undercoat film to serve as an SiO2 composite film.
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9.
公开(公告)号:US06218606B1
公开(公告)日:2001-04-17
申请号:US09404219
申请日:1999-09-23
IPC分类号: H01L31048
CPC分类号: H01L31/044 , H01L31/0201 , H01L31/048 , H01L31/0747 , Y02E10/50 , Y10S136/293
摘要: A plurality of solar cell groups having a plurality of solar cells connected to each other electrically in serial. A plurality of diodes are connected to each of the solar cell groups electrically in parallel. The plurality of diodes are sealed between transmissive front surface members and transmissive rear surface members together with the plurality of solar cell groups.
摘要翻译: 具有多个太阳能电池的多个太阳能电池组相互串联连接。 多个二极管并联电连接到每个太阳能电池组。 多个二极管与多个太阳能电池组一起被密封在透射前表面构件和透射后表面构件之间。
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公开(公告)号:US5069727A
公开(公告)日:1991-12-03
申请号:US578088
申请日:1990-09-05
申请人: Shinichi Kouzuma , Hiroshi Inoue , Kenji Murata , Hiroyuki Tanaka , Yasuo Kishi
发明人: Shinichi Kouzuma , Hiroshi Inoue , Kenji Murata , Hiroyuki Tanaka , Yasuo Kishi
IPC分类号: H01L31/0392 , H01L31/048
CPC分类号: H01L31/03921 , H01L31/048 , Y02E10/50
摘要: A flexible photovoltaic device comprises a first transparent, insulating, and flexible resin layer; a transparent electrode formed on the first resin layer; a flexible resin type locking member formed having satisfactory adherence along the inner periphery of the transparent electrode; a semiconductor layer formed to cover the transparent electrode and the locking member for photoelectric conversion; a back electrode formed on the semiconductor layer; and a second insulating and flexible resin layer formed on the back electrode.
摘要翻译: 柔性光伏器件包括第一透明,绝缘和柔性树脂层(2); 形成在第一树脂层(3)上的透明电极; 沿着透明电极(3)的内周具有令人满意的粘着性的柔性树脂型锁定件(3a); 形成为覆盖透明电极(3)的半导体层(4)和用于光电转换的锁定构件(3a); 形成在所述半导体层(4)上的背面电极(5)。 以及形成在所述背面电极(5)上的第二绝缘和柔性树脂层(14)。
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