公开(公告)号：US06368977B1

公开(公告)日：2002-04-09

申请号：US09605436

申请日：2000-06-29

申请人： Masaki Narita ,  Yukimasa Yoshida ,  Katsuaki Aoki ,  Hiroshi Fujita ,  Takashi O ,  Toshimitsu Omine ,  Isao Matsui ,  Osamu Yamazaki ,  Naruhiko Kaji

发明人： Masaki Narita ,  Yukimasa Yoshida ,  Katsuaki Aoki ,  Hiroshi Fujita ,  Takashi O ,  Toshimitsu Omine ,  Isao Matsui ,  Osamu Yamazaki ,  Naruhiko Kaji

IPC分类号： H01L2100

CPC分类号： H01L21/67069 ,  H01J37/32082

摘要： There is provided a semiconductor device manufacturing method that comprises a first step of loading a processed substrate in a reaction chamber, a second step of introducing a reaction gas into the reaction chamber at a predetermined flow rate, a third step of maintaining an interior of the reaction chamber at a predetermined pressure, a fourth step of starting generation of plasma by supplying a high frequency power to an electrode arranged in the reaction chamber, a fifth step of applying a predetermined process to the processed substrate, and a sixth step of stopping generation of the plasma by stopping supply of the high frequency power after the predetermined process is completed, wherein the reaction gas is introduced continuously when the generation of the plasma is stopped.

摘要翻译： 提供了一种半导体器件制造方法，其包括将处理过的衬底装载在反应室中的第一步骤，以预定流量将反应气体引入反应室的第二步骤，保持反应室内部的第三步骤 在预定压力下的反应室，通过向布置在反应室中的电极提供高频功率而开始产生等离子体的第四步骤，向经处理的基板施加预定处理的第五步骤，以及停止发生的第六步骤 的等离子体通过在预定处理完成之后停止供给高频功率，其中当等离子体的产生停止时反应气体被连续地引入。

公开(公告)号：US06333246B1

公开(公告)日：2001-12-25

申请号：US09604722

申请日：2000-06-28

申请人： Masaki Narita ,  Yukimasa Yoshida ,  Katsuaki Aoki ,  Hiroshi Fujita ,  Osamu Yamazaki ,  Toshimitsu Omine ,  Isao Matsui ,  Takashi O

发明人： Masaki Narita ,  Yukimasa Yoshida ,  Katsuaki Aoki ,  Hiroshi Fujita ,  Osamu Yamazaki ,  Toshimitsu Omine ,  Isao Matsui ,  Takashi O

IPC分类号： H01L2120

CPC分类号： H01J37/321 ,  C23C16/4401 ,  C23C16/50 ,  H01L21/31116

摘要： A semiconductor device manufacturing method comprises the steps of placing a substrate to be processed on an electrostatic chuck on a substrate stand in a process chamber, and applying a negative voltage to the electrostatic chuck. After applying the negative voltage, the substrate is stuck onto the electrostatic chuck, a process gas is introduced into the process chamber, discharge plasma is generated, and the substrate is processed as predetermined.

摘要翻译： 半导体器件制造方法包括以下步骤：将处理的基板放置在处理室中的基板支架上的静电卡盘上，并向静电卡盘施加负电压。 在施加负电压之后，将基板粘贴到静电卡盘上，将处理气体引入到处理室中，产生放电等离子体，并且如预定的那样处理基板。

公开(公告)号：US07247888B2

公开(公告)日：2007-07-24

申请号：US11067640

申请日：2005-02-28

申请人： Hirotaka Ogihara ,  Yukio Nishiyama ,  Akio Ui ,  Takashi O

发明人： Hirotaka Ogihara ,  Yukio Nishiyama ,  Akio Ui ,  Takashi O

IPC分类号： H01L29/74 ,  H01L31/111

CPC分类号： H01L21/68757 ,  C23C16/4585 ,  C23C16/5093 ,  H01J37/32633 ,  H01J37/32642 ,  H01L21/67069 ,  H01L21/68735 ,  H01L29/0661

摘要： There is here disclosed a film forming ring including a ring main body being made of an insulating material and formed in an annular shape along an edge of a substrate on which a film forming process by using a material gas in a plasma state is applied, and an inner rim of the ring main body being formed higher than its outside portion.

摘要翻译： 这里公开了一种成膜环，其包括环形主体，该环形主体由绝缘材料制成并且沿着基板的边缘形成为环状，在该边缘上施加以等离子体状态的原料气体的成膜工艺，以及 环形主体的内缘形成得比其外侧部分高。

公开(公告)号：US20050191811A1

公开(公告)日：2005-09-01

申请号：US11067640

申请日：2005-02-28

申请人： Hirotaka Ogihara ,  Yukio Nishiyama ,  Akio Ui ,  Takashi O

发明人： Hirotaka Ogihara ,  Yukio Nishiyama ,  Akio Ui ,  Takashi O

IPC分类号： H01L21/31 ,  C23C16/458 ,  C23C16/509 ,  H01L21/00 ,  H01L21/336 ,  H01L21/687 ,  H01L29/06

CPC分类号： H01L21/68757 ,  C23C16/4585 ,  C23C16/5093 ,  H01J37/32633 ,  H01J37/32642 ,  H01L21/67069 ,  H01L21/68735 ,  H01L29/0661

摘要： There is here disclosed a film forming ring comprising a ring main body being made of an insulating material and formed in an annular shape along an edge of a substrate on which a film forming process by using a material gas in a plasma state is applied, and an inner rim of the ring main body being formed higher than its outside portion.

摘要翻译： 这里公开了一种成膜环，其包括由绝缘材料制成的环形主体，并且沿着基板的边缘形成为环状，在该边缘上施加以等离子体状态的原料气体的成膜工艺，以及 环形主体的内缘形成得比其外侧部分高。