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公开(公告)号：US5589883A
公开(公告)日：1996-12-31
申请号：US257441
申请日：1994-06-08
申请人： Masanori Ogino , Takeo Yamada , Miyuki Ikeda , Tsuneo Fujikura , Takahiko Fujiwara , Etsuhiro Nakagiri
发明人： Masanori Ogino , Takeo Yamada , Miyuki Ikeda , Tsuneo Fujikura , Takahiko Fujiwara , Etsuhiro Nakagiri
CPC分类号： H04N9/645
摘要： A cathode ray tube display in which a signal for detection of a cathode current is inserted into a part of the vertical blanking period of the video signal to be displayed, a cathode current corresponding to the signal for detection is detected, and a cathode voltage or a grid voltage is negative feedback controlled so that the detected cathode current becomes constant, thereby stabilizing the cathode current. The display has a local overscan circuit for executing a vertical scan on the screen with a width larger than a predetermined scan width only at a timing of the cathode current detecting signal inserted for a vertical blanking period, and even in the case where an underscan system to scan by a width smaller than a predetermined display screen width is used as a scan system of the screen display. The invention prevents a harmful visible display image by the cathode current detecting signal appears on the screen.
摘要翻译： 一种阴极射线管显示器，其中用于检测阴极电流的信号被插入待显示的视频信号的垂直消隐周期的一部分中，检测与用于检测的信号相对应的阴极电流，以及阴极电压或 栅极电压被负反馈控制，使得检测到的阴极电流变得恒定，从而稳定阴极电流。 显示器具有本地过扫描电路，仅在垂直消隐期间插入的阴极电流检测信号的定时，在屏幕上执行宽度大于预定扫描宽度的垂直扫描，并且即使在下扫系统 使用小于预定显示屏宽度的宽度扫描作为屏幕显示的扫描系统。 本发明防止阴极电流检测信号出现在屏幕上的有害可见显示图像。
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公开(公告)号：US5010280A
公开(公告)日：1991-04-23
申请号：US514592
申请日：1990-04-26
申请人： Masanori Ogino , Takeo Yamada , Miyuki Ikeda
发明人： Masanori Ogino , Takeo Yamada , Miyuki Ikeda
CPC分类号： H04N3/223
摘要： A vertical deflection circuit for a CRT display device comprises a first negative feedback circuit for detecting a vertical deflection current flowing through a vertical deflection coil feeding it back to a ramp wave generator to thereby stabilize a vertical size of the display image on the CRT screen, second negative feedback circuit connected between the deflection coil to an input of the output circuit for detecting a mean vertical deflection current which is fedback to an output circuit to thereby stabilize a vertical position of the display image on the CRT screen and a controlling circuit for controlling feedback amount of the first and second negative feedback circuits to thereby regulate a vertical size and a vertical position of the display image on the CRT screen variably.
摘要翻译： 用于CRT显示装置的垂直偏转电路包括：第一负反馈电路，用于检测流过垂直偏转线圈的垂直偏转电流，将其反馈回斜波发生器，从而稳定CRT屏幕上显示图像的垂直尺寸; 第二负反馈电路连接在偏转线圈与输出电路的输入端之间，用于检测反馈到输出电路的平均垂直偏转电流，从而稳定显示图像在CRT屏幕上的垂直位置，以及控制电路，用于控制 从而可以可变地调节CRT显示屏上的显示图像的垂直尺寸和垂直位置。
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公开(公告)号：US5053724A
公开(公告)日：1991-10-01
申请号：US530183
申请日：1990-05-29
申请人： Masanori Ogino , Takeo Yamada , Miyuki Ikeda
发明人： Masanori Ogino , Takeo Yamada , Miyuki Ikeda
CPC分类号： H03L7/093 , H03L2207/14
摘要： In a high prrecision PLL circuit arrangement, a phase detecting circuit produces a detecting signal which is directly proportional to a phase difference between a horizontal synchronizing signal and a voltage-controlled oscillating signal. A loop filter circuit produces a delay signal for delaying a frequency control at a predetermined time constant in response to the detecting signal derived from the phase detecting circuit. A voltage-controlled oscillating circuit produces an oscillating signal having a frequency directly proportional to a voltage of the delay signal from the loop filter circuit. A non-linear circuit includes a non-linear element for changing at least one of an AC gain and a DC gain of the loop filter circuit, and prevents an erroneous capture phenomenon of the PLL circuit arrangement in response to the detecting signal from the phase detecting circuit.
摘要翻译： 在高精度PLL电路装置中，相位检测电路产生与水平同步信号和压控振荡信号之间的相位差成正比的检测信号。 环路滤波器电路响应于从相位检测电路导出的检测信号，产生用于延迟预定时间常数的频率控制的延迟信号。 压控振荡电路产生具有与来自环路滤波器电路的延迟信号的电压成正比的频率的振荡信号。 非线性电路包括用于改变环路滤波器电路的AC增益和DC增益中的至少一个的非线性元件，并且响应于来自相位的检测信号防止PLL电路装置的错误捕获现象 检测电路。
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公开(公告)号：US4918359A
公开(公告)日：1990-04-17
申请号：US335434
申请日：1989-04-10
申请人： Masanori Ogino , Takeo Yamada , Miyuki Ikeda
发明人： Masanori Ogino , Takeo Yamada , Miyuki Ikeda
CPC分类号： H04N3/18
摘要： A vertical deflection circuit used in a cathode ray tube display device for shortening a vertical blanking period is disclosed which includes back-flow blocking diode means for preventing an oscillating current from flowing backward to a vertical push-pull output amplifier circuit in the vertical blanking period, resonating capacitor means, and electrostatic energy supplying means for energizing a fly-back pulse. The resonating capacitor means is provided to generate resonance due to the capacitance of the capacitor means and the inductance of a vertical deflection coil, on the basis of the electro-magnetic energy of the vertical deflection coil at a time immediately before a retrace line starts from the bottom of display screen, thereby producing a fly-back pulse. The back-flow blocking diode means prevents the fly-back pulse from flowing backward to the vertical output circuit, that is, prevents the fly-back pulse from de-energizing the output of the vertical output circuit. According to the above vertical deflection circuit, the power consumption in a vertical retrace operation is reduced, and a ratio of the vertical blanking period to a vertical scanning period can be made small. Accordingly, an effective scanning time is increased, and it becomes possible to display information precisely.
摘要翻译： 公开了用于缩短垂直消隐期的阴极射线管显示装置中使用的垂直偏转电路，其包括用于防止振荡电流在垂直消隐期间向后流向垂直推挽输出放大器电路的反向流阻塞二极管装置 谐振电容器装置和用于激励回扫脉冲的静电能量供给装置。 谐振电容器装置被设置为基于电容器装置的电容和垂直偏转线圈的电感，基于垂直偏转线圈的电磁能在回扫线开始之前的时间产生谐振 显示屏的底部，从而产生回扫脉冲。 逆流阻塞二极管装置防止反向脉冲向后流向垂直输出电路，即防止回扫脉冲使垂直输出电路的输出断电。 根据上述垂直偏转电路，垂直回扫操作中的功耗降低，并且可以使垂直消隐周期与垂直扫描周期的比例变小。 因此，有效的扫描时间增加，可以精确地显示信息。
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公开(公告)号：US5189347A
公开(公告)日：1993-02-23
申请号：US810298
申请日：1991-12-19
CPC分类号： H03G3/30 , H03F3/45479 , H04N5/148
摘要： A video output circuit for driving a CRT of a grid-cathode differential drive type is disclosed, in which a collector potential of an output transistor in a horizontal blanking interval is detected by a diode arrangement; the potential thus detected is smoothed by a smoothing filtering arrangement output current of the output transistor is controlled by an output obtained by the smoothing filtering arrangement; and negative feedback control is effected so that the collector potential of the output transistor is made constant. In this way, a bias adjusting power supply, which was required heretofore, is made unnecessary.
摘要翻译： 公开了一种用于驱动栅极 - 阴极差分驱动型CRT的视频输出电路，其中通过二极管装置检测水平消隐间隔中的输出晶体管的集电极电位; 通过平滑滤波装置平滑所检测的电位，输出晶体管的输出电流由平滑滤波装置获得的输出控制; 进行负反馈控制，使输出晶体管的集电极电位恒定。 以这种方式，不需要偏向调节电源。
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6.发明授权Display having automatic correction device for horizontal deflection distortion 失效显示器具有用于水平偏转变形的自动校正装置
公开(公告)号：US5070281A
公开(公告)日：1991-12-03
申请号：US525667
申请日：1990-05-21
申请人： Masanori Ogino , Takeo Yamada , Miyuki Ikeda
发明人： Masanori Ogino , Takeo Yamada , Miyuki Ikeda
CPC分类号： H04N3/233 , G09G1/04 , H01J29/702 , H04N3/27 , H01J2229/5687
摘要： A CRT display including a horizontal deflection circuit. The horizontal deflection coil supplied with a horizontal deflection signal, with inductance L, has an energy-dissipating coil resistance connected in series and hence a second-order distortion expanding the left-hand side of the picture screen of the display and contracting the right-hand side thereof is produced. In the preset invention, to correct for the second-order distortion, the current flowing through the deflection coil means is detected, the deflection distortion component is extracted from the current, and a deflection distortion correcting current corresponding to the deflection distortion is supplied to an auxiliary coil for correcting the horizontal deflection of the electron beam.
摘要翻译： 一种CRT显示器，包括水平偏转电路。 供给具有电感L的水平偏转信号的水平偏转线圈具有串联连接的消能线圈电阻，因此扩展显示器的画面的左侧并收缩右侧的电压， 生产其手边。 在本发明中，为了校正二次失真，检测流过偏转线圈装置的电流，从电流中提取偏转失真分量，将与偏转失真对应的偏转失真校正电流提供给 用于校正电子束的水平偏转的辅助线圈。
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7.发明授权Video output circuit with wide bandwidth and low power consumption for high resolution display 失效视频输出电路具有宽带宽和低功耗，可实现高分辨率显示
公开(公告)号：US5337090A
公开(公告)日：1994-08-09
申请号：US986033
申请日：1992-12-04
CPC分类号： H03H7/06 , H03F3/191 , H03F3/45071 , H04N5/148 , H04N5/208
摘要： A video output circuit of a wide bandwidth comprises a bridged-T-type circuit, a first inductor connected in series to the bridged-T-type circuit, and a shunt circuit connected in series to the bridged-T-type circuit and including a second inductor and a first resistor connected in parallel with each other. The bridged-T-type circuit, the first inductor and the shunt circuit cooperate to constitute together with a plurality of stray capacitors a low-pass filter whose order is at least 4 and whose merit index is at least 3.
摘要翻译： 宽带宽的视频输出电路包括桥接T型电路，与桥接T型电路串联连接的第一电感器，以及与桥接T型电路串联连接的并联电路，包括： 第二电感器和第一电阻器彼此并联连接。 桥接T型电路，第一电感器和分流电路配合与多个杂散电容器一起构成低阶滤波器，其阶数至少为4，其优点指数至少为3。
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公开(公告)号：US5194783A
公开(公告)日：1993-03-16
申请号：US893944
申请日：1992-06-04
申请人： Masanori Ogino , Takeo Yamada , Miyuki Ikeda , Takashi Azuma , Satoshi Ootomo
发明人： Masanori Ogino , Takeo Yamada , Miyuki Ikeda , Takashi Azuma , Satoshi Ootomo
摘要： A digital convergence correction circuit for a CRT display unit deals with the problem of an excessive calculation time of the microprocessor expended for the vertical interpolation by using at least two pieces of ROM (read only memory) devices connected together. The circuit deals with the problem of a step variation of brightness by employment of a novel slope interpolation means which implements interpolation based on a continuous waveform of the first-order differential coefficient at the lattice points of the display screen and a curve interpolation means which forms a more superior convergence system. The circuit uses a blanking means to prevent abnormal states from appearing on the display screen during the transfer period of the digital convergence correction data of a new format at the switching of the scanning format for a video signal to be displayed. The circuit includes a two-dimensional interpolation means which evaluates a set of lattice point data of the new format based on the parameter of the new format from a set of lattice point data of the old format. Consequently, the circuit eliminates the need of having many expensive ROMs for each scanning line and for each format individually, allowing a smaller ROM capacity and a shorter format switching time, and moreover a reduced number of adjustment steps required for individual formats.
摘要翻译： 用于CRT显示单元的数字会聚校正电路通过使用连接在一起的至少两条ROM（只读存储器）装置来处理为垂直内插所花费的微处理器的计算时间过长的问题。 该电路通过使用基于显示屏的格子点处的一阶微分系数的连续波形来实现插值的新颖的斜率插值装置和形成图形的曲线插值装置来处理亮度的阶跃变化的问题 更优越的融合系统。 在切换要显示的视频信号的扫描格式的新格式的数字会聚校正数据的传送期间，电路使用消隐装置来防止异常状态出现在显示屏上。 电路包括二维插值装置，其基于来自旧格式的一组格点数据的新格式的参数来评估新格式的一组格点数据。 因此，电路消除了对于每个扫描线和每个格式分别具有许多昂贵的ROM的需要，允许更小的ROM容量和更短的格式切换时间，并且还减少了各种格式所需的调整步骤数量。
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公开(公告)号：US4961030A
公开(公告)日：1990-10-02
申请号：US353787
申请日：1989-05-18
申请人： Masanori Ogino , Takeo Yamada , Miyuki Ikeda , Toshiyuki Kimoto
发明人： Masanori Ogino , Takeo Yamada , Miyuki Ikeda , Toshiyuki Kimoto
摘要： The present invention relates to a miss convergence compensating circuit of a projection type display. The projection type display is provided with three projection tubes for red, green and blue colors and a color image is obtained by combining three colors from three projection tubes on a screen. When such projection tubes are arranged slant to the screen, miss convergence is generated on the screen. A convergence yoke for auxiliary deflection of electron beam is generally provided in order to compensate for such miss convergence, but this convergence yoke has the deflection sensitivity which is worse than that of deflection yoke. Therefore, the present invention contributes to compensate for miss convergence using the deflection yokes. For this purpose, at least two deflection coils are provided with a transformer coupling which allow the compensating currents corresponding to the miss convergence compensating signals to flow. In this case, the transformer coupling is coupled so that the currents of opposite polarities are caused to flow into at least two deflection coils as the compensating currents.
摘要翻译： 本发明涉及一种投影型显示器的未来会聚补偿电路。 投影型显示器具有用于红色，绿色和蓝色三种的投影管，并且通过在屏幕上组合来自三个投影管的三种颜色获得彩色图像。 当这样的投影管倾斜地布置在屏幕上时，屏幕上产生错过的会聚。 通常提供用于电子束的辅助偏转的会聚轭，以补偿这种错过会聚，但是该会聚轭的偏转灵敏度比偏转线圈的偏转灵敏度差。 因此，本发明有助于补偿使用偏转轭的未结合。 为此，至少两个偏转线圈设置有变压器耦合，其允许对应于未结收敛补偿信号的补偿电流流动。 在这种情况下，变压器耦合被耦合，使得相反极性的电流作为补偿电流被引入至少两个偏转线圈。
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公开(公告)号：US4952850A
公开(公告)日：1990-08-28
申请号：US378905
申请日：1989-07-12
申请人： Masanori Ogino , Takeo Yamada , Miyuki Ikeda
发明人： Masanori Ogino , Takeo Yamada , Miyuki Ikeda
CPC分类号： H04N3/27
摘要： A horizontal deflection circuit for a multiple scan display, capable of controlling the horizontal deflection voltage for a plurality of horizontal scanning frequencies. The output power of the amplifier is controlled on the basis of the result of detection of the data of horizontal size of the image plane so that the horizontal size of the image plane is adjusted to a predetermined size. The data of horizontal size of the image plane is obtained through the detection of the amplitude of a flyback pulse signal. The amplitude of a sawtooth signal for horizontal scanning is controlled according to the deviation of the detected amplitude of the flyback pulse signal from a predetermined value. The horizontal deflection circuit is very simple in construction and is capable of carrying out continuous horizontal deflection according to the horizontal scanning frequency varying in a plurality of levels.
摘要翻译： 一种用于多扫描显示的水平偏转电路，能够控制多个水平扫描频率的水平偏转电压。 基于对图像平面的水平尺寸的数据的检测结果来控制放大器的输出功率，使得将图像平面的水平尺寸调整到预定的尺寸。 通过检测回扫脉冲信号的幅度来获得图像平面的水平尺寸的数据。 根据检测到的回扫脉冲信号的幅度与预定值的偏差来控制用于水平扫描的锯齿波信号的幅度。 水平偏转电路的结构非常简单，能够根据以多个等级变化的水平扫描频率进行连续的水平偏转。
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