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36 条记录 (耗时 0.033 秒)

    Source driver
    1.
    发明申请
    Source driver 审中-公开
    源驱动程序

    公开(公告)号：US20100321361A1

    公开(公告)日：2010-12-23

    申请号：US12457741

    申请日：2009-06-19

    申请人： Meng-Tse Weng ,  Chuan-Che Lee ,  Chin-Tien Chang ,  Chien-Ru Chen

    发明人： Meng-Tse Weng ,  Chuan-Che Lee ,  Chin-Tien Chang ,  Chien-Ru Chen

    IPC分类号： G09G5/00

    CPC分类号： G09G3/3607 ,  G09G3/3688

    摘要： A source driver includes a gamma voltage generator and a digital to analog converter. The gamma voltage generator generates a plurality of gamma voltages, in which the gamma voltage generator includes a gamma resistor string, a second resistor, a plurality of first switches and a second switch. The first resistors are electrically connected serially for dividing a first gamma reference voltage and a second gamma reference voltage, in which the first resistors have first ends and second ends for providing gamma voltages. The second resistor has a first end electrically connected to the gamma resistor string and a second end receiving a third gamma reference voltage. The first switches are uniformly conducted to the first ends or the second ends of the first resistors according to a timing control signal for passing the gamma voltages.

    摘要翻译： 源驱动器包括伽马电压发生器和数模转换器。 伽马电压发生器产生多个伽马电压，其中伽马电压发生器包括伽马电阻串，第二电阻，多个第一开关和第二开关。 第一电阻器串联电连接以分割第一伽马参考电压和第二伽马参考电压，其中第一电阻器具有用于提供伽马电压的第一端和第二端。 第二电阻器具有电连接到伽马电阻器串的第一端和接收第三伽马参考电压的第二端。 根据用于通过伽马电压的定时控制信号，第一开关被均匀地传导到第一电阻器的第一端或第二端。

    Display system and source driver thereof
    2.
    发明申请
    Display system and source driver thereof 审中-公开
    显示系统及其源驱动程序

    公开(公告)号：US20100321370A1

    公开(公告)日：2010-12-23

    申请号：US12457740

    申请日：2009-06-19

    申请人： Meng-Tse Weng ,  Chuan-Che Lee ,  Chin-Tien Chang

    发明人： Meng-Tse Weng ,  Chuan-Che Lee ,  Chin-Tien Chang

    IPC分类号： G06F3/038 ,  G09G3/36

    CPC分类号： G09G3/3696 ,  G09G3/3688 ,  G09G2300/0443 ,  G09G2310/027 ,  G09G2320/0276 ,  G09G2320/028

    摘要： A source driver includes a gamma voltage generator, in which the gamma voltage generator includes a first gamma resistor string and a second gamma resistor string. The first gamma resistor string receives a first gamma reference voltage and generates a plurality of first gamma voltages. The second gamma resistor string receives a second gamma reference voltage and generates a plurality of second gamma voltages, in which the second gamma voltages have different voltage values from the first gamma voltages. The switch circuit selects the first gamma voltages or the second gamma voltages as output gamma voltages according to a timing control signal. The digital to analog converter selects one of the output gamma voltages as a driving voltage corresponding to a received digital pixel data for driving a first pixel region or a second pixel region of the sub-pixel.

    摘要翻译： 源极驱动器包括伽马电压发生器，其中伽马电压发生器包括第一伽马电阻串和第二伽马电阻串。 第一伽马电阻串接收第一伽马参考电压并产生多个第一伽玛电压。 第二伽马电阻串接收第二伽马参考电压并产生多个第二伽马电压，其中第二伽马电压具有与第一伽马电压不同的电压值。 开关电路根据定时控制信号选择第一伽马电压或第二伽马电压作为输出伽马电压。 数模转换器选择输出伽马电压之一作为对应于用于驱动子像素的第一像素区域或第二像素区域的接收数字像素数据的驱动电压。

    RECEIVER START-UP COMPENSATION CIRCUIT
    4.
    发明申请
    RECEIVER START-UP COMPENSATION CIRCUIT 有权
    接收器启动补偿电路

    公开(公告)号：US20070273434A1

    公开(公告)日：2007-11-29

    申请号：US11420771

    申请日：2006-05-29

    申请人： Chin-Tien Chang ,  Chien-Ru Chen ,  Ying-Lieh CHEN

    发明人： Chin-Tien Chang ,  Chien-Ru Chen ,  Ying-Lieh CHEN

    IPC分类号： G05F1/10

    CPC分类号： G05F3/262

    摘要： An integrated circuit includes a current mirror circuit for providing a current at an output end, a power-down switch coupled to the output end of the current mirror circuit for controlling access of the current generated by the current mirror circuit based on signals received at a control end of the power-down switch, and a compensating unit coupled to a bias end of the current mirror circuit and the power-down switch for stabilizing voltages at the bias end of the current mirror circuit.

    摘要翻译： 一种集成电路包括用于在输出端提供电流的电流镜电路，耦合到电流镜电路的输出端的掉电开关，用于根据在电流镜电路中接收的信号控制由电流镜电路产生的电流的存取 掉电开关的控制端，以及耦合到电流镜电路的偏置端的补偿单元和用于稳定电流镜电路的偏置端的电压的掉电开关。

    Wafer and test method thereof
    5.
    发明授权
    Wafer and test method thereof 有权
    晶圆及其测试方法

    公开(公告)号：US08274302B2

    公开(公告)日：2012-09-25

    申请号：US12609365

    申请日：2009-10-30

    申请人： Tzong-Yau Ku ,  Chien-Ru Chen ,  Chin-Tien Chang ,  Ying-Lieh Chen ,  Lin-Kai Bu

    发明人： Tzong-Yau Ku ,  Chien-Ru Chen ,  Chin-Tien Chang ,  Ying-Lieh Chen ,  Lin-Kai Bu

    IPC分类号： G01R31/02 ,  G01R31/26

    CPC分类号： G01R31/2851 ,  G01R31/2831 ,  G01R31/2884

    摘要： A wafer and a test method thereof are provided. The invention utilizes a first group of probes to perform a high voltage stress (HVS) test on a first chip, and utilizes a second group of probes to perform a function test on a second chip, where a period of the high voltage stress test overlaps a period of the function test, thereby greatly decreasing the test time of the wafer.

    摘要翻译： 提供晶片及其测试方法。 本发明利用第一组探针在第一芯片上执行高电压应力（HVS）测试，并且利用第二组探针在第二芯片上进行功能测试，其中高压应力测试的周期重叠 功能测试的一段时间，从而大大降低了晶片的测试时间。

    Receiver start-up compensation circuit
    8.
    发明授权
    Receiver start-up compensation circuit 有权
    接收机启动补偿电路

    公开(公告)号：US07446568B2

    公开(公告)日：2008-11-04

    申请号：US11420771

    申请日：2006-05-29

    申请人： Chin-Tien Chang ,  Chien-Ru Chen ,  Ying-Lieh Chen

    发明人： Chin-Tien Chang ,  Chien-Ru Chen ,  Ying-Lieh Chen

    IPC分类号： H03K19/0175 ,  H03K19/094

    CPC分类号： G05F3/262

    摘要： An integrated circuit includes a current mirror circuit for providing a current at an output end, a power-down switch coupled to the output end of the current mirror circuit for controlling access of the current generated by the current mirror circuit based on signals received at a control end of the power-down switch, and a compensating unit coupled to a bias end of the current mirror circuit and the power-down switch for stabilizing voltages at the bias end of the current mirror circuit.

    摘要翻译： 一种集成电路包括用于在输出端提供电流的电流镜电路，耦合到电流镜电路的输出端的掉电开关，用于根据在电流镜电路中接收的信号控制由电流镜电路产生的电流的存取 掉电开关的控制端，以及耦合到电流镜电路的偏置端的补偿单元和用于稳定电流镜电路的偏置端的电压的掉电开关。

    Digital-to-analog converter
    9.
    发明授权
    Digital-to-analog converter 失效
    数模转换器

    公开(公告)号：US07474245B1

    公开(公告)日：2009-01-06

    申请号：US11898538

    申请日：2007-09-13

    申请人： Hui-Min Wang ,  Chen-Song Yen ,  Chin-Tien Chang ,  Chuan-Che Lee

    发明人： Hui-Min Wang ,  Chen-Song Yen ,  Chin-Tien Chang ,  Chuan-Che Lee

    IPC分类号： H03M1/68

    CPC分类号： H03M1/682 ,  H03M1/765

    摘要： A digital-to-analog converter outputting an output analog voltage according to an N-bit digital signal is provided. The digital-to-analog converter includes a first and a second resistor strings, a first and a second select units. The first resistor string is connected between a first and a second power supply voltages to generate a first group of reference voltages. The first select unit selects two reference voltages out of the first group according to M most significant bits of the N-bit digital signal. The second resistor string is connected between the selected reference voltages to generate a second group of reference voltages between the selected reference voltages. The second select unit selects one reference voltage out of the second group as the output analog voltage according to the N-M least significant bits of the N-bit digital signal.

    摘要翻译： 提供了根据N位数字信号输出输出模拟电压的数模转换器。 数模转换器包括第一和第二电阻串，第一和第二选择单元。 第一电阻串连接在第一和第二电源电压之间以产生第一组参考电压。 第一选择单元根据N位数字信号的M个最高有效位选择第一组中的两个参考电压。 第二电阻串连接在所选择的参考电压之间，以在所选参考电压之间产生第二组参考电压。 第二选择单元根据N位数字信号的N-M个最低有效位选择第二组中的一个参考电压作为输出模拟电压。

    Output buffering circuit, amplifier device, and display device with reduced power consumption
    10.
    发明授权
    Output buffering circuit, amplifier device, and display device with reduced power consumption 有权
    输出缓冲电路，放大器器件和显示器件，功耗降低

    公开(公告)号：US08284186B2

    公开(公告)日：2012-10-09

    申请号：US12357020

    申请日：2009-01-21

    申请人： Chin-Tien Chang ,  Ching-Chung Lee

    发明人： Chin-Tien Chang ,  Ching-Chung Lee

    IPC分类号： G09G5/00

    CPC分类号： G09G3/3688 ,  G09G2310/0291 ,  G09G2330/021

    摘要： An output buffering circuit of a driver device for a display includes a first amplifier circuit having a first input stage, coupled between an upper power supply and a lower power supply, and a first output stage, coupled between the upper power supply and a first intermediate power supply that is greater than the lower power supply, and a second amplifier circuit having a second input stage coupled between the upper power supply and the lower power supply, and a second output stage coupled between a second intermediate power supply that is lower than the upper power supply and the lower power supply.

    摘要翻译： 用于显示器的驱动器装置的输出缓冲电路包括：第一放大器电路，具有耦合在上电源和下电源之间的第一输入级和耦合在上电源和第一中间电路之间的第一输出级 电源大于较低电源，以及第二放大器电路，其具有耦合在上电源和下电源之间的第二输入级，以及耦合在低于第二中间电源的第二中间电源之间的第二输出级 上电源和较低电源。