Methods of Trench and Contact Formation in Memory Cells
    1.
    发明申请
    Methods of Trench and Contact Formation in Memory Cells 有权
    记忆细胞中沟槽和接触形成的方法

    公开(公告)号:US20090011594A1

    公开(公告)日:2009-01-08

    申请号:US12211603

    申请日:2008-09-16

    IPC分类号: H01L21/768

    摘要: Methods of contact formation and memory arrays formed using such methods, which methods include providing a substrate having a contacting area; forming a plurality of line-shape structures extending in a first direction; forming a hard mask spacer beside the line-shape structure; forming an insulating material layer above the hard mask spacer; forming a contiguous trench in the insulating material layer extending in a second direction different from the first direction and exposing the contacting area; and forming a conductive line in the trench to contact the contacting area.

    摘要翻译: 使用这种方法形成的接触形成方法和记忆阵列,该方法包括提供具有接触区域的基底; 形成沿第一方向延伸的多个线状结构; 在线形结构旁边形成硬掩模间隔物; 在硬掩模间隔物上形成绝缘材料层; 在绝缘材料层中形成连续的沟槽,该沟槽沿与第一方向不同的第二方向延伸并暴露接触区域; 以及在所述沟槽中形成导电线以接触所述接触区域。

    Methods of trench and contact formation in memory cells
    2.
    发明授权
    Methods of trench and contact formation in memory cells 有权
    记忆细胞中沟槽和接触形成的方法

    公开(公告)号:US07666784B2

    公开(公告)日:2010-02-23

    申请号:US12211603

    申请日:2008-09-16

    IPC分类号: H01L21/4763

    摘要: Methods of contact formation and memory arrays formed using such methods, which methods include providing a substrate having a contacting area; forming a plurality of line-shape structures extending in a first direction; forming a hard mask spacer beside the line-shape structure; forming an insulating material layer above the hard mask spacer; forming a contiguous trench in the insulating material layer extending in a second direction different from the first direction and exposing the contacting area; and forming a conductive line in the trench to contact the contacting area.

    摘要翻译: 使用这种方法形成的接触形成方法和记忆阵列,该方法包括提供具有接触区域的基底; 形成沿第一方向延伸的多个线状结构; 在线形结构旁边形成硬掩模间隔物; 在硬掩模间隔物上形成绝缘材料层; 在绝缘材料层中形成连续的沟槽,该沟槽沿与第一方向不同的第二方向延伸并暴露接触区域; 以及在所述沟槽中形成导电线以接触所述接触区域。

    DIODE-LESS ARRAY FOR ONE-TIME PROGRAMMABLE MEMORY
    5.
    发明申请
    DIODE-LESS ARRAY FOR ONE-TIME PROGRAMMABLE MEMORY 有权
    一次性可编程存储器的二极管阵列

    公开(公告)号:US20090116274A1

    公开(公告)日:2009-05-07

    申请号:US12346706

    申请日:2008-12-30

    IPC分类号: G11C17/00 H01L29/66

    摘要: A one-time programmable memory array includes a first row conductor extending in a first row direction and disposed at a first elevation, a second row conductor extending in a second row direction and disposed at a second elevation and a column conductor extending in a column direction and disposed adjacent to the first row conductor and adjacent to the second row conductor. The array also includes a dielectric layer covering at least a portion of the column conductor, a fuse link coupled between the dielectric layer on the column conductor and the second row conductor.

    摘要翻译: 一次可编程存储器阵列包括在第一行方向上延伸并且设置在第一高度的第一行导体,在第二行方向上延伸并设置在第二高度的第二行导体和沿列方向延伸的列导体 并且设置成与第一行导体相邻并且与第二行导体相邻。 阵列还包括覆盖列导体的至少一部分的电介质层,耦合在列导体上的电介质层和第二行导体之间的熔丝链。

    Method of forming a contact on a semiconductor device
    6.
    发明授权
    Method of forming a contact on a semiconductor device 有权
    在半导体器件上形成接触的方法

    公开(公告)号:US07776690B2

    公开(公告)日:2010-08-17

    申请号:US11691501

    申请日:2007-03-27

    IPC分类号: H01L21/336

    摘要: A method of forming a contact on a semiconductor device is provided. First, a substrate is provided. A plurality of gate structures defined by a plurality of word lines in a first direction, and a plurality of diffusion regions covered by a first dielectric layer in a second direction are provided over the substrate. The gate structures located underneath the word lines and isolated by the diffusion regions. Then, an etching stop layer is formed. The etching stop layer and the first dielectric layer have different etching selectivity. A second dielectric layer is formed over the substrate. Furthermore, a plurality of contact holes to the diffusion regions between the word lines are formed by using the etching stop layer as a self-aligned mask.

    摘要翻译: 提供了一种在半导体器件上形成接触的方法。 首先,提供基板。 由第一方向上的多个字线限定的多个栅极结构和在第二方向上由第一电介质层覆盖的多个扩散区域设置在该基板上。 位于字线下方并由扩散区隔离的栅极结构。 然后,形成蚀刻停止层。 蚀刻停止层和第一介电层具有不同的蚀刻选择性。 第二介质层形成在衬底上。 此外,通过使用蚀刻停止层作为自对准掩模,形成到字线之间的扩散区域的多个接触孔。

    METHOD OF FORMING A CONTACT ON A SEMICONDUCTOR DEVICE
    8.
    发明申请
    METHOD OF FORMING A CONTACT ON A SEMICONDUCTOR DEVICE 有权
    在半导体器件上形成接触的方法

    公开(公告)号:US20070190719A1

    公开(公告)日:2007-08-16

    申请号:US11691501

    申请日:2007-03-27

    IPC分类号: H01L21/8242

    摘要: A method of forming a contact on a semiconductor device is provided. First, a substrate is provided. A plurality of gate structures defined by a plurality of word lines in a first direction, and a plurality of diffusion regions covered by a first dielectric layer in a second direction are provided over the substrate. The gate structures located underneath the word lines and isolated by the diffusion regions. Then, an etching stop layer is formed. The etching stop layer and the first dielectric layer have different etching selectivity. A second dielectric layer is formed over the substrate. Furthermore, a plurality of contact holes to the diffusion regions between the word lines are formed by using the etching stop layer as a self-aligned mask.

    摘要翻译: 提供了一种在半导体器件上形成接触的方法。 首先,提供基板。 由第一方向上的多个字线限定的多个栅极结构和在第二方向上由第一电介质层覆盖的多个扩散区域设置在该基板上。 位于字线下方并由扩散区隔离的栅极结构。 然后,形成蚀刻停止层。 蚀刻停止层和第一介电层具有不同的蚀刻选择性。 第二介质层形成在衬底上。 此外,通过使用蚀刻停止层作为自对准掩模,形成到字线之间的扩散区域的多个接触孔。

    Non-volatile memory and fabricating method thereof
    9.
    发明授权
    Non-volatile memory and fabricating method thereof 有权
    非易失性存储器及其制造方法

    公开(公告)号:US07214983B2

    公开(公告)日:2007-05-08

    申请号:US10904703

    申请日:2004-11-24

    IPC分类号: H01L29/792

    摘要: A method of fabricating a non-volatile memory is provided. A plurality of stack gate strips is formed on a substrate and a plurality of source/drain regions is formed in the substrate beside the stack gate strips. A plurality of dielectric strips is formed on the source/drain regions. A plurality of word lines is formed on the stack gate strips and the dielectric strips. Thereafter, the stack gate strips exposed by the word lines are removed to form a plurality of openings. A plurality of spacers is formed on the sidewalls of the openings and the word lines. A dielectric layer is formed over the substrate. A plurality of contacts is formed in the dielectric layer and the dielectric strips between two adjacent word lines.

    摘要翻译: 提供了一种制造非易失性存储器的方法。 在基板上形成多个堆叠栅极条,并且在堆叠栅极条旁边的基板上形成多个源极/漏极区域。 在源/漏区上形成多个介质条。 多个字线形成在堆叠栅极条和介质条上。 此后,除去由字线露出的堆叠栅极条以形成多个开口。 在开口和字线的侧壁上形成多个间隔物。 介电层形成在衬底上。 在电介质层和两个相邻字线之间的介质条形成多个触点。