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公开(公告)号：US06334165B1
公开(公告)日：2001-12-25
申请号：US09436107
申请日：1999-11-08
IPC分类号： G06F1200
CPC分类号： G06F12/0684 , G11C16/08 , G11C2216/30
摘要： A method, system, and computer program product are disclosed for determining the address type of a serial EEPROM in an electronic system. The method includes reading data from at least one location of the EEPROM for a first time and saving the data for future reference. Thereafter, a sequence of transactions is executed that alters the contents of the EEPROM in a prescribed manner if the EEPROM is of a first type. The sequence of transaction leaves the EEPROM in an unaltered state if the EEPROM is of a second type. Data is then read from at least one location of the EEPROM for a second time. The location of the data read from the EEPROM the second time is the same as the location of the data read the first time if the EEPROM is of the first type. The data read the first time and the data read the second time are then compared. If it is determined that the data read the second time does not differ in the prescribed manner from the data read the first time, the type of the EEPROM is identified as the second type. In one embodiment, the indicate steps are repeated to achieve additional assurance that type of the EEPROM is the first type if it is determined that the data read the second time differs in the prescribed manner from the data read the first time. In one embodiment, reading data from the EEPROM for the first time includes, writing an initial byte to the EEPROM for a first time to set the address pointer to a known state if the EEPROM is of the first type. In one embodiment, the sequence of transactions include writing two bytes to the EEPROM, wherein the value of the first of the two bytes is the value of the initial byte written to the EEPROM. In one embodiment, the method includes, prior to reading data from the EEPROM for the first time writing two bytes to the EEPROM if is determined that the EEPROM is configured with an address type indicator field, where the two bytes comprise the 2-byte address of the indicator field in an EEPROM of the second type. In this embodiment, the two bytes of address type indicator information are read from the EEPROM. The contents of the two bytes are indicative of the address type of the EEPROM.
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公开(公告)号：US06745270B1
公开(公告)日：2004-06-01
申请号：US09773185
申请日：2001-01-31
IPC分类号： G06F1300
CPC分类号： G06F13/4291 , G06F2213/0016 , G06F2213/0052
摘要： A method, apparatus and program for dynamically allocating addresses to computer devices connected to Inter Integrated Circuit (I2C) buses are provided. Upon resetting a I2C bus, the invention uses a bus driver to turn on the first bus switch on the bus. The invention then accesses the first device downstream of the switch and allocates a new value to the device's address. The invention proceeds to turn on the next switch downstream. A new address is then allocated to the device downstream from the second switch. This process continues until all of the devices connected to the bus have unique addresses.
摘要翻译： 提供了一种用于向连接到集成电路（I 2 C）总线的计算机设备动态分配地址的方法，装置和程序。 在重置I 2 C总线时，本发明使用总线驱动器来打开总线上的第一总线开关。 然后，本发明访问交换机下游的第一设备，并向设备的地址分配新的值。 本发明继续打开下游的下一个开关。 然后将新地址从第二交换机下游分配给设备。 此过程一直持续到连接到总线的所有设备都具有唯一的地址。
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公开(公告)号：US07085863B2
公开(公告)日：2006-08-01
申请号：US10698065
申请日：2003-10-30
CPC分类号： G06F13/4286
摘要： An I2C device is disclosed that includes a main I2C section, bus switches, switch logic, and address logic as part of the I2C device. The I2C device is coupled to an I2C bus for communicating with other I2C devices and an I2C bus controller that is also on the I2C bus. The switch logic controls a current position of the switches. The I2C device is coupled to the I2C bus utilizing the switches. The switches control whether the main I2C section, the address logic, the switch logic, or a combination of the main I2C section, address logic, and switch logic is currently coupled to I2C bus. The switches also can be used, if desired to remove from the buss all devices that are downstream from a given device containing switches. The address logic is used to receive and store the address of the I2C device. The I2C device will respond to the address that is stored in its address logic.
摘要翻译： 公开了一种包括主I 2 C部分，总线开关，开关逻辑和作为I 2 2 C部分的地址逻辑的I < SUP> C设备。 I 2 C装置耦合到I 2 C总线，用于与其他I 2 C装置通信，以及I < / SUP> C总线控制器，也在I 2 C总线上。 开关逻辑控制开关的当前位置。 使用开关将I 2 SUPER C装置耦合到I 2 C总线。 开关控制主I 2 S区段，地址逻辑，开关逻辑或主I 2 SUP区段，地址逻辑和开关逻辑的组合 目前与I C> C总线相连。 如果需要从交换机的给定设备下游的所有设备中删除所有设备，也可以使用交换机。 地址逻辑用于接收和存储I 2 C设备的地址。 I 2 C设备将响应存储在其地址逻辑中的地址。
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4.发明授权公开(公告)号：US06769078B2
公开(公告)日：2004-07-27
申请号：US09779368
申请日：2001-02-08
IPC分类号： G06F1100
CPC分类号： G06F11/221
摘要： A method system, and computer program product for determining the source of a fault within a bus, such as, for example, an inter integrated circuit (I2C) bus is provided. In one embodiment, a bus driver monitors the bus for faults. If a fault occurs on the bus, the bus driver resets each switch on the bus and then turns on the first switch connected to the bus driver. If the fault is encountered after turning on the first switch, then it is determined that the fault was caused by either the first switch, a device connected to the bus as a result of turning on the first switch, or one of the bus connectors just switched on as a result of turning on the first switch. If the fault is not encountered, the next switch is turned on and the process is repeated until the fault is encountered. The fault when encountered will be caused by either the most recently turned on switch or a device or bus connectors switched in by the turning on of the last switch. Thus, the fault can be isolated to a few devices, switches, or bus connections rather than the large number of potential devices, switches, or bus connections that could have potentially caused the fault.
摘要翻译： 提供了一种用于确定总线内的故障源（例如，集成电路（I2C）总线）的方法，系统和计算机程序产品。 在一个实施例中，总线驱动器监视总线的故障。 如果总线上出现故障，总线驱动程序会复位总线上的每个开关，然后打开连接到总线驱动器的第一个开关。 如果在打开第一个开关后遇到故障，则确定故障是由第一开关，连接到总线的设备由于打开第一个开关而导致的，或者总线连接器之一 作为打开第一个开关的结果打开。 如果没有遇到故障，下一个开关打开，重复该过程，直到遇到故障。 遇到的故障将由最近打开的开关或通过最后一个开关导通而切换的设备或总线连接器引起。 因此，故障可以隔离到几个设备，交换机或总线连接，而不是可能潜在地导致故障的大量潜在设备，交换机或总线连接。
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公开(公告)号：US06725320B1
公开(公告)日：2004-04-20
申请号：US09779364
申请日：2001-02-08
IPC分类号： G06F1300
CPC分类号： G06F13/4022
摘要： A bus switch module for use in a bus such as an I2C bus is provided. In one embodiment, the switch module includes a control unit and a switch. The control unit includes an input for receiving instructions from a bus driver as to whether to close or open the switch. The switch includes a first and a second data connection which connect the switch to a first and a second segment of the bus and includes a control input for receiving commands from the control unit. The control unit opens and closes the switch in response to instructions received from the bus driver and signals received in the first data connection are passed to the second data connection only when the switch is closed in response to a command from the control unit.
摘要翻译： 提供了一种用于诸如I2C总线的总线的总线开关模块。 在一个实施例中，开关模块包括控制单元和开关。 控制单元包括用于从总线驱动器接收关于是否关闭或打开开关的指令的输入。 开关包括将开关连接到总线的第一和第二段的第一和第二数据连接，并且包括用于从控制单元接收命令的控制输入。 控制单元响应于从总线驱动器接收的指令来打开和关闭开关，并且仅当响应于来自控制单元的命令关闭开关时，才将第一数据连接中接收到的信号传递到第二数据连接。
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6.发明授权Apparatus and method for performing surveillance prior to boot-up of an operating system 失效在启动操作系统之前进行监视的装置和方法公开(公告)号：US06745343B1
公开(公告)日：2004-06-01
申请号：US09615769
申请日：2000-07-13
IPC分类号： G06F1100
CPC分类号： G06F11/327 , G06F11/0757
摘要： An apparatus and method for performing surveillance prior to boot-up of an operating system is provided. The apparatus and method include an error detector that monitors a boot-up sequence of a support system for the occurrence of an error. If an error is detected, a unit check signal is output by the error detector. The unit check signal is received by either the support system or an error message output device and a corresponding error message is generated and output for use by a user of the computing system.
摘要翻译： 提供了一种用于在启动操作系统之前进行监视的装置和方法。 该装置和方法包括一个错误检测器，该检测器监视支持系统的引导序列以发生错误。 如果检测到错误，则错误检测器输出单位检查信号。 单元检查信号由支持系统或错误消息输出设备接收，并且生成相应的错误消息并输出供计算系统的用户使用。
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7.发明授权Method and apparatus for storing and using chipset built-in self-test signatures 失效用于存储和使用芯片组内置自检签名的方法和装置公开(公告)号：US06564348B1
公开(公告)日：2003-05-13
申请号：US09434874
申请日：1999-11-04
IPC分类号： G01R3128
CPC分类号： G06F11/2284 , G06F11/27
摘要： A method and apparatus for storing and using chipset built-in self-test (BIST) signatures is provided. A BIST for a chip in a data processing system may be initiated by a power-on-reset in the data processing system. The BIST signature generated during the BIST is compared with a predetermined BIST signature stored in a vital products data (VPD) module associated with the chip is read. A difference between the generated BIST signature and the predetermined BIST signature is then reported.
摘要翻译： 提供了一种用于存储和使用芯片组内置自检（BIST）签名的方法和装置。 用于数据处理系统中的芯片的BIST可以通过数据处理系统中的上电复位来启动。 在BIST期间生成的BIST签名与存储在与芯片相关联的重要产品数据（VPD）模块中的预定BIST签名进行比较。 然后报告生成的BIST签名与预定的BIST签名之间的差异。
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公开(公告)号：US06516367B1
公开(公告)日：2003-02-04
申请号：US09339707
申请日：1999-06-24
IPC分类号： G06F1300
CPC分类号： G06F13/4081
摘要： A method, system and computer program product are provided for detecting the presence of devices, particularly hot plug devices, connected to a bus both during start-up of a computer system and while the system is running. At start-up, and periodically thereafter, all possible device connections are polled by microprocessors, called sub-bus controllers, which include logic for generating a map of components present on each bus. Each map is accessible by the master bus controller. During system run-time, periodic polling, may be continuous thereby providing a real time device status map for every available bus connection.
摘要翻译： 提供了一种方法，系统和计算机程序产品，用于在计算机系统启动期间和系统运行时检测连接到总线的设备，特别是热插拔设备的存在。 在启动时，并且周期性地，所有可能的设备连接被微处理器轮询，称为子总线控制器，其包括用于生成每个总线上存在的组件的映射的逻辑。 每个地图可由主总线控制器访问。 在系统运行期间，定期轮询可以是连续的，从而为每个可用的总线连接提供实时的设备状态图。
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公开(公告)号：US6145036A
公开(公告)日：2000-11-07
申请号：US163918
申请日：1998-09-30
CPC分类号： G06F13/4291
摘要： Polling of devices on an inter-IC (I.sup.2 C) is provided. An expansion processor resides on a primary I.sup.2 C bus. The expansion processor is coupled to a plurality of I.sup.2 C sub-buses each of which may host a plurality of I.sup.2 C devices. Data is transferred between the expansion processor and the plurality of I.sup.2 C devices via the corresponding sub-bus according to an I.sup.2 C protocol. Data transfer is in response to a request initiated by a bus master on the primary I.sup.2 C bus. The bus master communicates with a target device residing on one of the sub-buses by addressing the expansion processor. The bus master informs the expansion processor of the target device by sending the expansion processor a number of the sub-bus on which the target device resides, and an address of the target device. A data stream bound for the target device is directed to the expansion processor which then echos it to the target device. Likewise, a data stream bound from the target device to the bus master on the primary I.sup.2 C bus is transmitted to the expansion processor which then echos it to the bus master. Each of the target devices on the sub-bus can be polled to determine if they have failed. Failure of a device only affects operation of its sub-bus.
摘要翻译： 提供IC（ICI）设备轮询。 扩展处理器驻留在主I2C总线上。 扩展处理器耦合到多个I2C子总线，每个子副总线可以承载多个I2C设备。 根据I2C协议，数据通过相应的副总线在扩展处理器和多个I2C设备之间传输。 数据传输是响应由主I2C总线上的总线主机发起的请求。 总线主机通过寻址扩展处理器与位于其中一个子总线上的目标设备进行通信。 总线主机通过向扩展处理器发送目标设备所在的子总线数目和目标设备的地址来通知目标设备的扩展处理器。 绑定到目标设备的数据流被引导到扩展处理器，然后该扩展处理器回到目标设备。 同样，在主I2C总线上从目标设备绑定到总线主机的数据流被传输到扩展处理器，然后该扩展处理器回到总线主机。 可以轮询子总线上的每个目标设备，以确定它们是否出现故障。 设备故障只影响其子总线的运行。
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