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    Tri-layered power scheme for architectures which contain a micro-controller
    1.
    发明授权
    Tri-layered power scheme for architectures which contain a micro-controller 有权
    包含微控制器的架构的三层电源方案

    公开(公告)号：US07900072B2

    公开(公告)日：2011-03-01

    申请号：US11963215

    申请日：2007-12-21

    申请人： Michael Berger ,  Michael Derr ,  Joshua Resch ,  Mukesh Kataria ,  Mazen Gedeon ,  Eli Kupermann ,  Jeffrey John Vick

    发明人： Michael Berger ,  Michael Derr ,  Joshua Resch ,  Mukesh Kataria ,  Mazen Gedeon ,  Eli Kupermann ,  Jeffrey John Vick

    IPC分类号： G06F1/00 ,  G06F1/26 ,  H04M1/00 ,  G11C5/14

    CPC分类号： G06F1/3203 ,  G06F1/3243 ,  Y02D10/152

    摘要： Various embodiments are directed to a tri-layered power scheme for architectures which contain a microcontroller. In one embodiment, a power management system may comprise a microcontroller in a chipset, a low consumption power well to control a power supply to the microcontroller, and a power controller to control a power supply to the low consumption power well. The power management system may be arranged to switch among multiple power consumption states. In a maximum power consumption state, the microcontroller is on, the power controller is on, and the low consumption power well is on. In an intermediate power consumption state, the microcontroller is off, the power controller is on, and the low consumption power well is required to be on. In a minimum power consumption state, the microcontroller is off, the power controller is on, and the low consumption power well is optionally on or off at the discretion of the power controller. Other embodiments are described and claimed.

    摘要翻译： 各种实施例针对包含微控制器的架构的三层电力方案。 在一个实施例中，电源管理系统可以包括芯片组中的微控制器，以及用于控制对微控制器的电源的低功耗电力，以及功率控制器以便很好地控制对低功耗电力的供电。 电源管理系统可以被布置成在多个功耗状态之间切换。 在最大功耗状态下，微控制器打开，电源控制器打开，低功耗电源正常。 在中间功耗状态下，微控制器关闭，电源控制器处于打开状态，低功耗电源需要打开。 在最小功耗状态下，微控制器处于关闭状态，功率控制器处于开启状态，低功耗状态可以根据电源控制器选择开启或关闭。 描述和要求保护其他实施例。

    TRI-LAYERED POWER SCHEME FOR ARCHITECTURES WHICH CONTAIN A MICRO-CONTROLLER
    2.
    发明申请
    TRI-LAYERED POWER SCHEME FOR ARCHITECTURES WHICH CONTAIN A MICRO-CONTROLLER 有权
    用于包含微控制器的架构的三层电源方案

    公开(公告)号：US20090164819A1

    公开(公告)日：2009-06-25

    申请号：US11963215

    申请日：2007-12-21

    申请人： Michael Berger ,  Michael N. Derr ,  Joshua Resch ,  Mukesh Kataria ,  Mazen Gedeon ,  Eli Kupermann ,  Jeffrey John Vick

    发明人： Michael Berger ,  Michael N. Derr ,  Joshua Resch ,  Mukesh Kataria ,  Mazen Gedeon ,  Eli Kupermann ,  Jeffrey John Vick

    IPC分类号： G06F1/32

    CPC分类号： G06F1/3203 ,  G06F1/3243 ,  Y02D10/152

    摘要： Various embodiments are directed to a tri-layered power scheme for architectures which contain a microcontroller. In one embodiment, a power management system may comprise a microcontroller in a chipset, a low consumption power well to control a power supply to the microcontroller, and a power controller to control a power supply to the low consumption power well. The power management system may be arranged to switch among multiple power consumption states. In a maximum power consumption state, the microcontroller is on, the power controller is on, and the low consumption power well is on. In an intermediate power consumption state, the microcontroller is off, the power controller is on, and the low consumption power well is required to be on. In a minimum power consumption state, the microcontroller is off, the power controller is on, and the low consumption power well is optionally on or off at the discretion of the power controller. Other embodiments are described and claimed.

    摘要翻译： 各种实施例针对包含微控制器的架构的三层电力方案。 在一个实施例中，电源管理系统可以包括芯片组中的微控制器，以及用于控制对微控制器的电源的低功耗电力，以及功率控制器以便很好地控制对低功耗电力的供电。 电源管理系统可以被布置成在多个功耗状态之间切换。 在最大功耗状态下，微控制器打开，电源控制器打开，低功耗电源正常。 在中间功耗状态下，微控制器关闭，电源控制器处于打开状态，低功耗电源需要打开。 在最小功耗状态下，微控制器处于关闭状态，功率控制器处于开启状态，低功耗状态可以根据电源控制器选择开启或关闭。 描述和要求保护其他实施例。

    VERIFICATION OF CHIPSET FIRMWARE UPDATES
    3.
    发明申请
    VERIFICATION OF CHIPSET FIRMWARE UPDATES 审中-公开
    CHIPSET固件更新的验证

    公开(公告)号：US20100082955A1

    公开(公告)日：2010-04-01

    申请号：US12242835

    申请日：2008-09-30

    申请人： Jasmeet Chhabra ,  Mazen Gedeon ,  Sanjay Bakshi ,  Eli Kupermann

    发明人： Jasmeet Chhabra ,  Mazen Gedeon ,  Sanjay Bakshi ,  Eli Kupermann

    IPC分类号： H04L9/00 ,  G06F12/14 ,  G06F9/00

    CPC分类号： G06F21/572 ,  H04L9/3247

    摘要： In general, in one aspect, the disclosure describes an apparatus that includes updatable non-volatile memory to store firmware and non-updateable non-volatile memory to store an interrupt sequence. The apparatus includes a chip interface to receive an interrupt instruction from management firmware. Receipt of the interrupt instruction controls access to and initiation of the interrupt sequence. After initiation of the interrupt sequence the apparatus may receive a firmware update and/or validate the firmware is from a valid source. The validation of the firmware may include utilizing the management firmware to verify the cryptographic signature for the firmware.

    摘要翻译： 通常，一方面，本公开描述了一种装置，其包括可更新非易失性存储器以存储固件和不可更新的非易失性存储器以存储中断序列。 该装置包括用于从管理固件接收中断指令的芯片接口。 接收中断指令控制对中断序列的访问和启动。 在启动中断序列之后，设备可以接收固件更新和/或验证来自有效源的固件。 固件的验证可以包括利用管理固件验证固件的加密签名。