Dynamic payment service
    4.
    发明授权
    Dynamic payment service 有权
    动态支付服务

    公开(公告)号:US09141946B2

    公开(公告)日:2015-09-22

    申请号:US13997374

    申请日:2012-04-17

    摘要: Systems and methods may provide for implementing a dynamic payment service. In one example, the method may generate a request communication including purchase detail information relating to an item to request credit from a vendor to conduct a transaction relating to the item, determine a scope of credit to be issued to conduct the transaction relating to the item based on the purchase detail information, and generate a payment communication including the transaction information to complete the transaction relating to the item.

    摘要翻译: 系统和方法可以提供实现动态支付服务。 在一个示例中,该方法可以生成包括与商品相关的购买详细信息的请求通信,以从供应商请求信用以进行与该商品相关的交易,确定要发行的用于进行与该商品有关的交易的信用额度 并且生成包括交易信息的支付通信,以完成与该项目有关的交易。

    METHOD AND APPRATUS TO MANAGE POWER USAGE IN A PROCESSOR
    5.
    发明申请
    METHOD AND APPRATUS TO MANAGE POWER USAGE IN A PROCESSOR 有权
    在处理器中管理电源的方法和装置

    公开(公告)号:US20150177820A1

    公开(公告)日:2015-06-25

    申请号:US14138564

    申请日:2013-12-23

    IPC分类号: G06F1/32

    摘要: In an embodiment, a processor includes first logic to determine first power to be provided to a first portion of a computational resource during a time period. The first portion may be reserved for execution by the processor of a first workload to be executed during the time period. The first power may be determined based at least in part on the first workload and independently of a second workload. The processor may include second logic to determine second power to be provided to a second portion of the computational resource during the time period. The second portion may be reserved for execution by the processor of the second workload during the time period. The second power may be determined based at least in part on the second workload and independently of the first workload.

    摘要翻译: 在一个实施例中,处理器包括第一逻辑,以在一段时间内确定要提供给计算资源的第一部分的第一功率。 第一部分可以被保留以供处理器执行在该时间段期间执行的第一工作负载。 第一功率可以至少部分地基于第一工作负载并且独立于第二工作负载来确定。 处理器可以包括第二逻辑以确定在该时间周期期间要提供给计算资源的第二部分的第二功率。 在该时间段期间,第二部分可以被保留用于由处理器执行第二工作负载。 可以至少部分地基于第二工作负载并且独立于第一工作负载来确定第二功率。

    DYNAMIC PAYMENT SERVICE
    6.
    发明申请
    DYNAMIC PAYMENT SERVICE 有权
    动态付款服务

    公开(公告)号:US20140201030A1

    公开(公告)日:2014-07-17

    申请号:US13997374

    申请日:2012-04-17

    摘要: Systems and methods may provide for implementing a dynamic payment service. In one example, the method may generate a request communication including purchase detail information relating to an item to request credit from a vendor to conduct a transaction relating to the item, determine a scope of credit to be issued to conduct the transaction relating to the item based on the purchase detail information, and generate a payment communication including the transaction information to complete the transaction relating to the item.

    摘要翻译: 系统和方法可以提供实现动态支付服务。 在一个示例中,该方法可以生成包括与商品相关的购买详细信息的请求通信,以从供应商请求信用以进行与该商品相关的交易,确定要发行的用于进行与该商品有关的交易的信用额度 并且生成包括交易信息的支付通信,以完成与该项目有关的交易。

    VERIFICATION OF CHIPSET FIRMWARE UPDATES
    7.
    发明申请
    VERIFICATION OF CHIPSET FIRMWARE UPDATES 审中-公开
    CHIPSET固件更新的验证

    公开(公告)号:US20100082955A1

    公开(公告)日:2010-04-01

    申请号:US12242835

    申请日:2008-09-30

    IPC分类号: H04L9/00 G06F12/14 G06F9/00

    CPC分类号: G06F21/572 H04L9/3247

    摘要: In general, in one aspect, the disclosure describes an apparatus that includes updatable non-volatile memory to store firmware and non-updateable non-volatile memory to store an interrupt sequence. The apparatus includes a chip interface to receive an interrupt instruction from management firmware. Receipt of the interrupt instruction controls access to and initiation of the interrupt sequence. After initiation of the interrupt sequence the apparatus may receive a firmware update and/or validate the firmware is from a valid source. The validation of the firmware may include utilizing the management firmware to verify the cryptographic signature for the firmware.

    摘要翻译: 通常,一方面,本公开描述了一种装置,其包括可更新非易失性存储器以存储固件和不可更新的非易失性存储器以存储中断序列。 该装置包括用于从管理固件接收中断指令的芯片接口。 接收中断指令控制对中断序列的访问和启动。 在启动中断序列之后,设备可以接收固件更新和/或验证来自有效源的固件。 固件的验证可以包括利用管理固件验证固件的加密签名。

    Tri-layered power scheme for architectures which contain a micro-controller
    10.
    发明授权
    Tri-layered power scheme for architectures which contain a micro-controller 有权
    包含微控制器的架构的三层电源方案

    公开(公告)号:US07900072B2

    公开(公告)日:2011-03-01

    申请号:US11963215

    申请日:2007-12-21

    摘要: Various embodiments are directed to a tri-layered power scheme for architectures which contain a microcontroller. In one embodiment, a power management system may comprise a microcontroller in a chipset, a low consumption power well to control a power supply to the microcontroller, and a power controller to control a power supply to the low consumption power well. The power management system may be arranged to switch among multiple power consumption states. In a maximum power consumption state, the microcontroller is on, the power controller is on, and the low consumption power well is on. In an intermediate power consumption state, the microcontroller is off, the power controller is on, and the low consumption power well is required to be on. In a minimum power consumption state, the microcontroller is off, the power controller is on, and the low consumption power well is optionally on or off at the discretion of the power controller. Other embodiments are described and claimed.

    摘要翻译: 各种实施例针对包含微控制器的架构的三层电力方案。 在一个实施例中,电源管理系统可以包括芯片组中的微控制器,以及用于控制对微控制器的电源的低功耗电力,以及功率控制器以便很好地控制对低功耗电力的供电。 电源管理系统可以被布置成在多个功耗状态之间切换。 在最大功耗状态下,微控制器打开,电源控制器打开,低功耗电源正常。 在中间功耗状态下,微控制器关闭,电源控制器处于打开状态,低功耗电源需要打开。 在最小功耗状态下,微控制器处于关闭状态,功率控制器处于开启状态,低功耗状态可以根据电源控制器选择开启或关闭。 描述和要求保护其他实施例。