Multi-layer integrated RF/IF circuit board
    2.
    发明申请
    Multi-layer integrated RF/IF circuit board 有权
    多层集成RF / IF电路板

    公开(公告)号:US20060017529A1

    公开(公告)日:2006-01-26

    申请号:US10894563

    申请日:2004-07-20

    IPC分类号: H01P3/08

    摘要: An improved multi-layered integrated RF/IF circuit board has been disclosed. The board is fabricated beginning with a center layer of material. In a first preferred embodiment, the center layer is a rigid core material. In a second preferred embodiment, the center layer is a pliable non-conductive material. For every layer added to the upper surface of the stack-up structure of the board, a corresponding layer of the same material is added to the lower surface of the stack-up structure. Thus, during the lamination process, both the upper and lower surfaces are primarily soft, pliable non-conductive material. These non-conductive layers absorb any stresses introduced during the lamination process. Thus, when cooled, the board has large area flatness. Standard manufacturing processes can be used for each individual step in the fabrication of the board. Therefore, a multi-layered integrated RF/IF circuit board in accordance with the present invention can be fabricated inexpensively.

    摘要翻译: 已经公开了改进的多层集成RF / IF电路板。 该电路板是以中心层材料制成的。 在第一优选实施例中,中心层是刚性芯材料。 在第二优选实施例中,中心层是柔韧的非导电材料。 对于添加到板的堆叠结构的上表面的每个层,将相同材料的相应层添加到叠层结构的下表面。 因此,在层压过程中,上表面和下表面都是柔软的,柔韧的非导电材料。 这些非导电层吸收层压过程中引入的任何应力。 因此,当冷​​却时,板具有大的面积平坦度。 标准制造工艺可用于板的制造中的每个单独步骤。 因此,可以廉价地制造根据本发明的多层集成RF / IF电路板。

    Systems and methods for reducing adjacent channel leakage ratio

    公开(公告)号:US10097268B2

    公开(公告)日:2018-10-09

    申请号:US15366125

    申请日:2016-12-01

    摘要: An analog radio over fiber (AROF) wavelength division multiplexing (WDM) system and method for reducing adjacent channel leakage ratio (ACLR) in a radio frequency signal provided by an AROF WDM system are provided. The AROF WDM system comprises a plurality of transmitters, a multiplexer, a demultiplexer, a plurality of receivers and a controller. Each transmitter is for receiving a radio frequency input signal and for modulating the radio frequency input signal onto an optical signal to obtain a modulated optical signal. The multiplexer is for receiving each modulated optical signal from the plurality of transmitters and for combining the modulated optical signals into a combined optical signal to be sent a distance over an optical fiber. The multiplexer has a pluralities of passbands with each passband having a center wavelength. The demultiplexer is for receiving the combined optical signal and for separating the combined optical signal back into the individual modulated optical signals. Each receiver is for receiving one of the modulated optical signals from the demultiplexer and for converting the received modulated optical signal into a radio frequency output signal. The controller is configured to detune, for each transmitter, one of that transmitter and the multiplexer relative to the other such that a wavelength of the modulated optical signal transmitted by that transmitter is longer than the center wavelength of a corresponding one of the plurality of passbands of the multiplexer.

    Method and apparatus for reducing transistor amplifier hysteresis
    4.
    发明授权
    Method and apparatus for reducing transistor amplifier hysteresis 有权
    降低晶体管放大器滞后的方法和装置

    公开(公告)号:US06373331B1

    公开(公告)日:2002-04-16

    申请号:US09658668

    申请日:2000-09-08

    IPC分类号: H03F126

    CPC分类号: H03F1/30 H03F1/565 H03F3/193

    摘要: A biasing method and apparatus which provides bias circuits of radio frequency (RF) power transistors with a low reactive impedance at low frequencies to reduce hysteresis related distortion without affecting the transistor input or output impedance or any impedance matching network which may be used. In one embodiment, reduced hysteresis within a lateral diffused metal-oxide semiconductor (LDMOS) transistor is brought about by a drain bias circuit without any impact on the transistor output impedance. By removing the effect of the bias circuit at RF frequencies, the bias circuit can be designed with a low reactive impedance at low frequencies without any material consequences on the transistor output impedance. With a low enough reactive impedance, the hysteresis introduced by the bias circuit is substantially reduced. An auxiliary bias feed external to an RF transistor package is also embodied.

    摘要翻译: 一种偏压方法和装置,其在低频下提供具有低反应阻抗的射频(RF)功率晶体管的偏置电路,以减小滞后相关失真,而不影响晶体管输入或输出阻抗或可使用的任何阻抗匹配网络。 在一个实施例中,侧向扩散金属氧化物半导体(LDMOS)晶体管内的减小的滞后由漏极偏置电路产生,而对晶体管输出阻抗没有任何影响。 通过消除偏置电路在RF频率下的影响,偏置电路可以在低频下被设计为具有低的无功阻抗,而不会对晶体管输出阻抗造成任何重大后果。 在具有足够低的无功阻抗的情况下,由偏置电路引入的滞后大大减小。 还实现了RF晶体管封装外部的辅助偏置馈电。

    Transformer coupled stacked power amplifier
    5.
    发明授权
    Transformer coupled stacked power amplifier 失效
    变压器耦合堆叠功率放大器

    公开(公告)号:US5867061A

    公开(公告)日:1999-02-02

    申请号:US760070

    申请日:1996-12-04

    IPC分类号: H03F3/42 H03F3/68 H03F3/26

    CPC分类号: H03F3/42

    摘要: A stacked power amplifier is provided in which an input signal is independently coupled to each of a series of amplifying devices in the stack. A transformer is used at the input circuit of each device to create an RF swing across each amplifying device which is substantially equal. This results in an equal distribution of RF and DC voltage among the devices in the stack.

    摘要翻译: 提供了一种堆叠式功率放大器,其中输入信号独立地耦合到堆叠中的一系列放大装置中的每一个。 在每个设备的输入电路上使用变压器,以在每个放大器件上产生基本相等的RF摆幅。 这导致堆叠中的器件之间的RF和DC电压的平均分配。