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    System and method for communicating command parameters between a processor and a memory flow controller
    1.
    发明申请
    System and method for communicating command parameters between a processor and a memory flow controller 失效
    用于在处理器和存储器流控制器之间传送命令参数的系统和方法

    公开(公告)号：US20070079018A1

    公开(公告)日：2007-04-05

    申请号：US11207986

    申请日：2005-08-19

    申请人： Michael Day ,  Charles Johns ,  Peichun Liu ,  Todd Swanson ,  Thuong Truong

    发明人： Michael Day ,  Charles Johns ,  Peichun Liu ,  Todd Swanson ,  Thuong Truong

    IPC分类号： G06F13/00

    CPC分类号： G06F13/32 ,  G06F13/1642

    摘要： A system and method for communicating command parameters between a processor and a memory flow controller are provided. The system and method make use of a channel interface as the primary mechanism for communicating between the processor and a memory flow controller. The channel interface provides channels for communicating with processor facilities, memory flow control facilities, machine state registers, and external processor interrupt facilities, for example. These channels may be designated as blocking or non-blocking. With blocking channels, when no data is available to be read from the corresponding registers, or there is no space available to write to the corresponding registers, the processor is placed in a low power “stall” state. The processor is automatically awakened, via communication across the blocking channel, when data becomes available or space is freed. Thus, the channels of the present invention permit the processor to stay in a low power state.

    摘要翻译： 提供了一种用于在处理器和存储器流控制器之间传送命令参数的系统和方法。 系统和方法利用通道接口作为处理器和存储器流控制器之间通信的主要机制。 通道接口例如提供用于与处理器设备，存储器流控制设备，机器状态寄存器和外部处理器中断设备进行通信的通道。 这些通道可以被指定为阻塞或非阻塞。 使用阻塞通道，当没有数据可用于从相应的寄存器读取时，或没有可用空间写入对应的寄存器时，处理器处于低功耗“停止”状态。 当数据可用或空间被释放时，通过阻塞通道的通信自动唤醒处理器。 因此，本发明的通道允许处理器保持在低功率状态。

    System and method for communicating instructions and data between a processor and external devices
    2.
    发明申请
    System and method for communicating instructions and data between a processor and external devices 失效
    用于在处理器和外部设备之间传送指令和数据的系统和方法

    公开(公告)号：US20070041403A1

    公开(公告)日：2007-02-22

    申请号：US11207970

    申请日：2005-08-19

    申请人： Michael Day ,  Charles Johns ,  John Liberty ,  Todd Swanson ,  Thuong Truong

    发明人： Michael Day ,  Charles Johns ,  John Liberty ,  Todd Swanson ,  Thuong Truong

    IPC分类号： G06F15/16 ,  H04J3/16 ,  H04J3/22

    CPC分类号： H04L49/9078 ,  H04L49/90 ,  H04L49/901

    摘要： A system and method for communicating instructions and data between a processor and external devices are provided. The system and method make use of a channel interface as the primary mechanism for communicating between the processor and a memory flow controller. The channel interface provides channels for communicating with processor facilities, memory flow control facilities, machine state registers, and external processor interrupt facilities, for example. These channels may be designated as blocking or non-blocking. With blocking channels, when no data is available to be read from the corresponding registers, or there is no space available to write to the corresponding registers, the processor is placed in a low power “stall” state. The processor is automatically awakened, via communication across the blocking channel, when data becomes available or space is freed. Thus, the channels of the present invention permit the processor to stay in a low power state.

    摘要翻译： 提供了一种用于在处理器和外部设备之间传送指令和数据的系统和方法。 系统和方法利用通道接口作为处理器和存储器流控制器之间通信的主要机制。 通道接口例如提供用于与处理器设备，存储器流控制设备，机器状态寄存器和外部处理器中断设备进行通信的通道。 这些通道可以被指定为阻塞或非阻塞。 使用阻塞通道，当没有数据可用于从相应的寄存器读取时，或没有可用空间写入对应的寄存器时，处理器处于低功耗“停止”状态。 当数据可用或空间被释放时，通过阻塞通道的通信自动唤醒处理器。 因此，本发明的通道允许处理器保持在低功率状态。

    System and method for communicating with a processor event facility
    3.
    发明申请
    System and method for communicating with a processor event facility 失效
    与处理器事件设施通信的系统和方法

    公开(公告)号：US20070043936A1

    公开(公告)日：2007-02-22

    申请号：US11207971

    申请日：2005-08-19

    申请人： Michael Day ,  Charles Johns ,  John Liberty ,  Todd Swanson

    发明人： Michael Day ,  Charles Johns ,  John Liberty ,  Todd Swanson

    IPC分类号： G06F7/38

    CPC分类号： G06F13/24

    摘要： A system and method for communicating with a processor event facility are provided. The system and method make use of a channel interface as the primary mechanism for communicating with the processor event facility. The channel interface provides channels for communicating with processor facilities, memory flow control facilities, machine state registers, and external processor interrupt facilities, for example. These channels may be designated as blocking or non-blocking. With blocking channels, when no data is available to be read from the corresponding registers, or there is no space available to write to the corresponding registers, the processor is placed in a low power “stall” state. The processor is automatically awakened, via communication across the blocking channel, when data becomes available or space is freed. Thus, the channels of the present invention permit the processor to stay in a low power state.

    摘要翻译： 提供了一种用于与处理器事件设施进行通信的系统和方法。 系统和方法利用通道接口作为与处理器事件设施通信的主要机制。 通道接口例如提供用于与处理器设备，存储器流控制设备，机器状态寄存器和外部处理器中断设备进行通信的通道。 这些通道可以被指定为阻塞或非阻塞。 使用阻塞通道，当没有数据可用于从相应的寄存器读取时，或没有可用空间写入对应的寄存器时，处理器处于低功耗“停止”状态。 当数据可用或空间被释放时，通过阻塞通道的通信自动唤醒处理器。 因此，本发明的通道允许处理器保持在低功率状态。

    System and method for incorporating design behavior and external stimulus in microprocessor emulation model feedback using a shared memory
    4.
    发明授权
    System and method for incorporating design behavior and external stimulus in microprocessor emulation model feedback using a shared memory 失效
    使用共享存储器将设计行为和外部刺激结合在微处理器仿真模型反馈中的系统和方法

    公开(公告)号：US08229727B2

    公开(公告)日：2012-07-24

    申请号：US11621335

    申请日：2007-01-09

    申请人： Sanjay Gupta ,  Joseph Anthony Perrie, III ,  Steven Leonard Roberts ,  Todd Swanson

    发明人： Sanjay Gupta ,  Joseph Anthony Perrie, III ,  Steven Leonard Roberts ,  Todd Swanson

    IPC分类号： G06F9/455

    CPC分类号： G06F17/5022

    摘要： A system and method for incorporating design behavior and external stimulus in microdevice model feedback using a shared memory is presented. The invention describe herein uses the attached memory model to provide additional heuristics to an application executing on an emulation system's device model, which results in a more detail and real-life device emulation. The attached memory model provides a storage area for a runtime software environment to store emulation data, which is subsequently provided to the device model during emulation. The emulation data may include 1) randomization stimuli to the device model, 2) additional runtime data for checking heuristics, and 3) emulation data points that are otherwise not accessible to the device model.

    摘要翻译： 提出了一种使用共享存储器将设计行为和外部刺激并入微设计模型反馈的系统和方法。 本文描述的本发明使用附加的存储器模型来为在仿真系统的设备模型上执行的应用提供附加启发式，这导致更细节和真实的设备仿真。 附加的存储器模型为运行时软件环境提供存储区域以存储仿真数据，随后在仿真期间将其提供给设备模型。 仿真数据可以包括1）对设备模型的随机化刺激，2）用于检查启发式的附加运行时间数据，以及3）设备模型否则不可访问的仿真数据点。

    Method and system for estimating power consumption of integrated circuitry
    5.
    发明授权
    Method and system for estimating power consumption of integrated circuitry 失效
    用于估计集成电路功耗的方法和系统

    公开(公告)号：US07720667B2

    公开(公告)日：2010-05-18

    申请号：US11530100

    申请日：2006-09-08

    申请人： Rajat Chaudhry ,  Tilman Gloekler ,  Daniel L. Stasiak ,  Todd Swanson

    发明人： Rajat Chaudhry ,  Tilman Gloekler ,  Daniel L. Stasiak ,  Todd Swanson

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5036

    摘要： First hardware is for executing first software in response to macros that describe integrated circuitry, and for generating a set of constants in response to the execution of the first software. Second hardware is for receiving the set of constants from the first hardware, and for executing second software in response to the macros and the set of constants, and for estimating a power consumption of the integrated circuitry in response to the execution of the second software.

    摘要翻译： 第一硬件是用于响应于描述集成电路的宏执行第一软件，以及响应于第一软件的执行而产生一组常数。 第二硬件用于从第一硬件接收一组常数，以及响应于宏和一组常数执行第二软件，并且用于响应于第二软件的执行来估计集成电路的功耗。

    System and method of automating the addition of RTL based critical timing path counters to verify critical path coverage of post-silicon software validation tools
    8.
    发明授权
    System and method of automating the addition of RTL based critical timing path counters to verify critical path coverage of post-silicon software validation tools 有权
    自动添加基于RTL的关键定时路径计数器的系统和方法，以验证后硅软件验证工具的关键路径覆盖

    公开(公告)号：US07895029B2

    公开(公告)日：2011-02-22

    申请号：US11927846

    申请日：2007-10-30

    申请人： Matthew Edward King ,  Charles Leverett Meissner ,  Todd Swanson ,  Michael Ellett Weissinger

    发明人： Matthew Edward King ,  Charles Leverett Meissner ,  Todd Swanson ,  Michael Ellett Weissinger

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5031

    摘要： A system and method for modifying a simulation model and optimizing an application program to produce valid hardware-identified operating conditions that are matched with simulator-identified operating conditions in order to modify a simulator accordingly is presented. A critical path coverage analyzer includes critical path measurement logic into a simulation model that injects errors into the critical path and provides visibility into the number of times that an application program exercises the critical path. The critical path coverage analyzer uses the critical path measurement logic to optimize an application program to adequately exercise and test the critical paths. Once optimized, the critical path coverage analyzer runs the optimized application program on a hardware device to produce hardware-identified operating conditions. The hardware-identified operating conditions are matched against simulator-identified operating conditions. When discrepancies exist, the simulator is modified accordingly to match the hardware-identified operating conditions.

    摘要翻译： 提出了一种系统和方法，用于修改仿真模型并优化应用程序以产生与模拟器识别的操作条件匹配的有效的硬件识别的操作条件，以便相应地修改模拟器。 关键路径覆盖分析器将关键路径测量逻辑包括到将模拟错误注入到关键路径中的模拟模型中，并提供对应用程序执行关键路径的次数的可见性。 关键路径覆盖分析仪使用关键路径测量逻辑来优化应用程序，以充分运行和测试关键路径。 一旦优化，关键路径覆盖分析仪在硬件设备上运行优化的应用程序，以产生硬件识别的操作条件。 硬件识别的操作条件与模拟器识别的操作条件匹配。 当存在差异时，相应地修改模拟器以匹配硬件识别的操作条件。