公开(公告)号：US4485455A

公开(公告)日：1984-11-27

申请号：US359556

申请日：1982-03-18

Applicant: Gary W. Boone ,  Michael J. Cochran

Inventor： Gary W. Boone ,  Michael J. Cochran

IPC: G06F3/02 ,  G06F3/14 ,  G06F3/147 ,  G06F9/00 ,  G06F13/00 ,  G06F15/02 ,  G09G3/04

CPC classification number: G09G3/04 ,  G06F15/02 ,  G06F3/1407

Abstract: A variable function calculator utilizes a fixed program memory array such as a programmed read only memory in which a number of programs are stored depending upon the desired functions of the calculator. The calculator also includes a program counter, an instruction register, control decoders, jump-condition circuits, a clock generator, a timing generator, decoders, key input logic, a data storage array, an arithmetic logic unit, an output decoder, and a digit scanner which scans both the keyboard and display outputs. Aside from providing basic desk top calculator functions, the read only memory may be programmed so that the system provides metering functions, arithmetic teaching functions, control functions, etc. A preferred embodiment of the invention is capable of being fabricated as a monolithic integrated semiconductor system utilizing contemporary metal-insulator-semiconductor techniques.

Abstract translation: 可变函数计算器利用诸如编程的只读存储器的固定程序存储器阵列，其中根据计算器的期望功能存储多个程序。 计算器还包括程序计数器，指令寄存器，控制解码器，跳转条件电路，时钟发生器，定时发生器，解码器，键输入逻辑，数据存储阵列，算术逻辑单元，输出解码器和 数字扫描仪扫描键盘和显示输出。 除了提供基本的桌面计算器功能之外，只读存储器可以被编程，使得系统提供测量功能，算术教学功能，控制功能等。本发明的优选实施例能够被制造为单片集成半导体系统 利用当代金属绝缘体半导体技术。

公开(公告)号：US4161697A

公开(公告)日：1979-07-17

申请号：US791449

申请日：1977-04-27

Applicant: Michael J. Cochran ,  Edward R. Caudel

Inventor： Michael J. Cochran ,  Edward R. Caudel

IPC: H03D1/24 ,  H03D7/00 ,  H03H15/02 ,  H03H17/00 ,  H03L7/091 ,  H03L7/18 ,  H03L7/183 ,  H04B1/40 ,  H04W84/00 ,  H04B1/16

CPC classification number: H04W84/00 ,  H03D1/24 ,  H03D7/00 ,  H03H15/02 ,  H03L7/091 ,  H03L7/183 ,  H04B1/40

Abstract: A radio receiver receives input signals comprised of a plurality of frequency bands lying respectively within a plurality of non-overlapping frequency channels. The signals include an itermittently present reference frequency signal. The radio receiver includes an autolock circuit for measuring the frequency of the intermittently present carrier and for generating digital signals indicating its frequency. A digital processor has inputs coupled to receive the digital signals for calculating in response thereto a selectable demodulating frequency dependent upon the frequency of the intermittently present carrier.

Abstract translation: 无线电接收机接收由分别位于多个非重叠频率信道中的多个频带组成的输入信号。 这些信号包括本地参考频率信号。 无线电接收机包括用于测量间歇存在载波的频率并产生指示其频率的数字信号的自动锁定电路。 数字处理器具有输入，其耦合以接收数字信号，以响应于此而计算取决于间歇性存在载波的频率的可选解调频率。

公开(公告)号：US4125867A

公开(公告)日：1978-11-14

申请号：US736005

申请日：1976-10-27

Applicant: Michael J. Cochran

Inventor： Michael J. Cochran

IPC: G06F7/50 ,  G06F7/57

CPC classification number: G06F7/483 ,  G06F7/495 ,  G06F7/504 ,  G06F2207/3844

Abstract: An electronic calculator or microprocessor system of the type preferably having keyboard input and a visual display is implemented with a semiconductor chip having a hexadecimal/binary coded decimal format arithmetic unit for performing arithmetic operations on numeric data inputted by the keyboard further, the system preferably includes an input, an address register responsive to the input, a instruction word memory for storing a number of instruction words and addressable in response to the address stored in the address register, and instruction word decoder logic for decoding instruction words outputted from the instruction word memory and for controlling the arithmetic unit in response thereto. The arithmetic unit is operable in a first mode for providing an output from the arithmetic unit in binary coded decimal format and in a second mode providing an output from the arithmetic unit in hexadecimal format.

Abstract translation: 优选具有键盘输入和视觉显示的电子计算器或微处理器系统由具有十六进制/二进制编码十进制格式运算单元的半导体芯片实现，用于进一步对由键盘输入的数字数据执行算术运算，该系统优选地包括 输入，响应于输入的地址寄存器，用于存储多个指令字并且可响应于存储在地址寄存器中的地址而寻址的指令字存储器，以及用于解码从指令字存储器输出的指令字的指令字解码器逻辑 并且用于响应于此控制算术单元。 算术单元可操作在第一模式中，用于以二进制编码的十进制格式提供来自运算单元的输出，并以第二模式提供十六进制格式的运算单元的输出。

公开(公告)号：US4053795A

公开(公告)日：1977-10-11

申请号：US702824

申请日：1976-07-06

Applicant: Michael J. Cochran

Inventor： Michael J. Cochran

IPC: H03K5/02 ,  H03K5/20

CPC classification number: H03K5/023

Abstract: A pair of input field effect transistors are arranged as a differential pair having an electrode of each connected in common and connected in turn to a circuit common by means of a third field effect transistor. A pair of output field effect transistors are coupled to the input field effect transistors and have an electrode of each connected in common and coupled to the gate of the third field effect transistor, thereby providing an amplifier which relatively insensitive to change in the threshold voltage of the field effect transistors.

公开(公告)号：US4020465A

公开(公告)日：1977-04-26

申请号：US428492

申请日：1973-12-26

Applicant: Michael J. Cochran ,  Stephen P. Hamilton

Inventor： Michael J. Cochran ,  Stephen P. Hamilton

IPC: G06K15/02 ,  G06F3/12 ,  H04L15/24

CPC classification number: G06K15/028

Abstract: A thermal line printer includes a semiconductor chip for control of A .times. N heaters arrayed in N groups past which thermally sensitive paper is stepped B times in printing a line of characters in an A .times. B dot matrix. A sequential access memory stores N multibit words, one word for each character to be printed on a given line with a commutator cyclically to read words from the memory A .times. B times for each line to be printed. A ROM has an A .times. B dot matrix code therein for each available character. A time sequencer and decoder connected to the ROM is synchronized with the commutator to produce a different one bit output from the ROM each time each given word is read from memory. A set of N enable circuits leads from the ROM to N groups of heaters. A set of A enable circuits leads from the sequencer to A groups of heaters where one heater in each A group is from one of the N groups. A decoder interfaces the sequencer to the A groups of heaters and to the motor sequentially to enable the heaters in one A group for each memory cycle and in order through the A columns and B rows of the matrix.

Abstract translation: 热线打印机包括用于控制以N组排列的A x N加热器的半导体芯片，其中热敏纸在A×B点阵列中打印一行字符是阶梯B次。 顺序访问存储器将N个多位字存储在一个给定行上的每个字符的一个字，循环地用换向器从每个行被打印的存储器读取字B×B次。 对于每个可用字符，ROM中具有A×B点阵码。 连接到ROM的定时器和解码器与换向器同步，每当从存储器读取每个给定字时，从ROM产生不同的一位输出。 一组N个使能电路从ROM引导到N组加热器。 一组A使能电路从定序器引导到一组加热器，每组A组中的一个加热器来自N组之一。 解码器将定序器与A组加热器和电机顺序接口，以使每个存储器周期中的一组A组中的加热器顺序通过矩阵的A列和B行。

公开(公告)号：US4000393A

公开(公告)日：1976-12-28

申请号：US501919

申请日：1974-08-29

Applicant: Michael J. Cochran ,  Larry D. Propst ,  Richard D. Harris ,  Robert E. Belland ,  John W. Richardson ,  Stephen P. Hamilton

Inventor： Michael J. Cochran ,  Larry D. Propst ,  Richard D. Harris ,  Robert E. Belland ,  John W. Richardson ,  Stephen P. Hamilton

IPC: H05B3/06 ,  H05B1/00

CPC classification number: H05B3/06

Abstract: A method of assembling, positioning, and making connections to a thermal printhead is disclosed. A substrate is provided upon which heating elements or mesas are mounted. Leads from these heating elements are continued on the same side of the substrate as the one on which the elements are located. The leads are brought to terminal pads where connections may be made to the logic circuit which selectively energizes the heating elements to form numerals or characters on heat sensitive paper. A flat flexible cable with conductor ends exposed is held in place so that the exposed conductor ends make contact with the terminal pads of one or more of such substrates. The substrates and cable are clamped together by two metal plates. This entire assembly is mounted on a spring-loaded pivot arrangement so as to hold the heating elements against the heat sensitive paper on an advancing platen. Connections may be made between the cable conductors and the printing logic to allow the heating elements to be energized.

Abstract translation: 公开了一种组合，定位和连接热敏打印头的方法。 设置有加热元件或台面安装的基板。 来自这些加热元件的引线在与元件所在的基板相同的一侧上继续。 引线被带到端子焊盘，其中可以对逻辑电路进行连接，逻辑电路选择性地激励加热元件以在热敏纸上形成数字或字符。 导体端部露出的扁平柔性电缆被固定到位，使得暴露的导体端部与一个或多个这样的基板的端子焊盘接触。 基板和电缆通过两个金属板夹在一起。 该整个组件安装在弹簧加载的枢转装置上，以将加热元件保持在前进压板上的热敏纸上。 可以在电缆导体和打印逻辑之间进行连接，以允许加热元件被通电。

公开(公告)号：US06353293B1

公开(公告)日：2002-03-05

申请号：US09519545

申请日：2000-03-06

Applicant: John R. Frus ,  Michael J. Cochran

Inventor： John R. Frus ,  Michael J. Cochran

IPC: H05B3702

CPC classification number: F02P15/10 ,  F02P3/08 ,  F02P3/0869 ,  F02P3/0892 ,  F02P9/002 ,  F02P9/007 ,  F02P15/003 ,  F02P15/08 ,  F02P17/12

Abstract: An apparatus for controllably generating sparks is provided. The apparatus includes a spark generating device; at least two output stages connected to the spark generating device; means for charging energy storage devices in the output stages and at least partially isolating each of the energy storage devices from the energy storage devices of the other output stages; and, a logic circuit for selectively triggering the output stages to generate a spark. Each of the output stages preferably includes: (1) an energy storage device to store the energy; (2) a controlled switch for selectively discharging the energy storage device; and (3) a network for transferring the energy discharged by the energy storage device to the spark generating device. In accordance with one aspect of the invention, the logic circuit, which is connected to the controlled switches of the output stages, can be configured to fire the stages at different times, in different orders, and/or in different combinations to provide the spark generating device with output pulses having substantially any desired waveshape and energy level to thereby produce a spark having substantially any desired energy level and plume shape at the spark generating device to suit any application.

Abstract translation: 提供一种用于可控地产生火花的装置。 该装置包括火花发生装置; 连接到火花发生装置的至少两个输出级; 用于对输出级中的能量存储装置进行充电并且至少部分地将每个能量存储装置与其它输出级的能量存储装置隔离的装置; 以及用于选择性地触发输出级以产生火花的逻辑电路。 每个输出级优选地包括：（1）存储能量的能量存储装置; （2）用于选择性地排出能量存储装置的受控开关; 和（3）用于将由储能装置排出的能量转移到火花发生装置的网络。 根据本发明的一个方面，连接到输出级的受控开关的逻辑电路可以被配置为在不同的时间，不同的顺序和/或以不同的组合来触发级，以提供火花 输出脉冲具有基本上任何期望的波形和能级，从而在火花发生装置处产生具有基本上任何期望能级和羽流形状的火花，以适应任何应用。

公开(公告)号：USH1970H1

公开(公告)日：2001-06-05

申请号：US07473541

申请日：1990-02-01

Applicant: Gary W. Boone ,  Michael J. Cochran

Inventor： Gary W. Boone ,  Michael J. Cochran

IPC: G06F1500

Abstract: A variable function calculator utilizes a fixed program memory array such as a programmed read only memory in which a number of programs are stored depending upon the desired functions of the calculator. The calculator also includes a program counter, an instruction register, control decoders, jump-condition circuits, a clock generator, a timing generator, digit and FLAG mask decoders, key input logic, a register and FLAG data storage array, a decimal and FLAG arithmetic logic unit, an output decoder, and a digit scanner which scans both the keyboard and display outputs. Aside from providing basic desk top calculator functions, the read only memory may be programmed so that the system provides metering functions, arithmetic teaching functions, control functions, etc.. A preferred embodiment of the invention is capable of being fabricated as a monolithic integrated semiconductor system utilizing contemporary metal-insulator-semiconductor techniques.

公开(公告)号：US6034483A

公开(公告)日：2000-03-07

申请号：US922242

申请日：1997-09-02

Applicant: John R. Frus ,  Michael J. Cochran

Inventor： John R. Frus ,  Michael J. Cochran

IPC: F02P3/08 ,  F02P9/00 ,  F02P15/00 ,  F02P15/08 ,  F02P15/10 ,  F02P17/12 ,  H05B37/02

CPC classification number: F02P15/10 ,  F02P15/003 ,  F02P3/0869 ,  F02P3/0892 ,  F02P9/002 ,  F02P9/007 ,  F02P15/08 ,  F02P17/12 ,  F02P3/08

Abstract: An apparatus for controllably generating sparks is provided. The apparatus includes a spark generating device; at least two output stages connected to the spark generating device; means for charging energy storage devices in the output stages and at least partially isolating each of the energy storage devices from the energy storage devices of the other output stages; and, a logic circuit for selectively triggering the output stages to generate a spark. Each of the output stages preferably includes: (1) an energy storage device to store the energy; (2) a controlled switch for selectively discharging the energy storage device; and (3) a network for transferring the energy discharged by the energy storage device to the spark generating device. In accordance with one aspect of the invention, the logic circuit, which is connected to the controlled switches of the output stages, can be configured to fire the stages at different times, in different orders, and/or in different combinations to provide the spark generating device with output pulses having substantially any desired waveshape and energy level to thereby produce a spark having substantially any desired energy level and plume shape at the spark generating device to suit any application.

Abstract translation: 提供一种用于可控地产生火花的装置。 该装置包括火花发生装置; 连接到火花发生装置的至少两个输出级; 用于对输出级中的能量存储装置进行充电并且至少部分地将每个能量存储装置与其它输出级的能量存储装置隔离的装置; 以及用于选择性地触发输出级以产生火花的逻辑电路。 每个输出级优选地包括：（1）存储能量的能量存储装置; （2）用于选择性地排出能量存储装置的受控开关; 和（3）用于将由储能装置排出的能量转移到火花发生装置的网络。 根据本发明的一个方面，连接到输出级的受控开关的逻辑电路可以被配置为在不同的时间，不同的顺序和/或以不同的组合来触发级，以提供火花 输出脉冲具有基本上任何期望的波形和能级，从而产生在火花发生装置上具有基本上任何期望的能级和羽流形状的火花，以适应任何应用。

公开(公告)号：US4731731A

公开(公告)日：1988-03-15

申请号：US704049

申请日：1985-02-21

Applicant: Michael J. Cochran

Inventor： Michael J. Cochran

IPC: A61M1/16 ,  G06G7/57 ,  B01D13/00 ,  H03M1/18

CPC classification number: A61M1/1656 ,  A61M1/1664

Abstract: A dialysis machine has control circuit which detects changes in input water temperature and compensates the water heater. The control circuit detects changes in the conductivity of the dialysate concentrate and compensates the concentrate pump. Changes in supply voltage are detected and the outputs of the several sensors and the inputs to the pumps and heater comensated. The control circuit periodically calibrates the blood leak detector. In each of the feedback loops which service the heater and each of the pumps, the control circuit varies both the loop response time and the loop gain to compensate for changes in the dialysate flow rate. The resolution of the D/A converters which drive the pumps are enhanced by the control circuit by time modulating the LSB of the respective digital drive value. If any of the several sensed operating conditions varies significantly from the expected value, the control circuit terminates dialysis.

Abstract translation: 透析机具有检测输入水温变化并补偿热水器的控制电路。 控制电路检测透析液浓缩物的电导率的变化并补偿浓缩泵。 检测到电源电压的变化，并将数个传感器的输出和泵和加热器的输入接通。 控制电路周期性地校准血液泄漏检测器。 在为加热器和每个泵服务的每个反馈回路中，控制电路改变环路响应时间和环路增益，以补偿透析液流量的变化。 驱动泵的D / A转换器的分辨率由控制电路通过对相应数字驱动值的LSB进行时间调制而增强。 如果几个检测到的操作条件中的任何一个与预期值显着变化，则控制电路终止透析。