公开(公告)号：US20240393978A1

公开(公告)日：2024-11-28

申请号：US18603746

申请日：2024-03-13

Applicant: Micron Technology, Inc.

Inventor： Marco REDAELLI ,  Gianluca COPPOLA

IPC: G06F3/06

Abstract: Implementations described herein relate to memory device background operations. In some implementations, a memory device may receive a background operation command, from a host device, that indicates for the memory device to initiate a background operation for a memory of the memory device. The background operation command may include at least one of an optimization indicator, an idle time indicator, or a power-off time indicator. The memory device may initiate the background operation in accordance with the background operation command.

公开(公告)号：US20240134519A1

公开(公告)日：2024-04-25

申请号：US18048251

申请日：2022-10-19

Applicant: Micron Technology, Inc.

Inventor： Gaurav SINHA ,  Marco REDAELLI

IPC: G06F3/06

CPC classification number: G06F3/0604 ,  G06F3/0631 ,  G06F3/0679

Abstract: Implementations described herein relate to a cluster namespace for a memory device. In some implementations, a memory device may receive a cluster namespace instruction, from a host device, that instructs the memory device to create a cluster namespace using memory resources of the memory device that are spread across a plurality of namespaces of the memory device. The memory device may identify namespace storage information that indicates memory resources associated with a plurality of namespaces of the memory device. The memory device may create the cluster namespace based on creating a plurality of extents that respectively map sets of logical block address ranges from the plurality of namespaces to the cluster namespace.

公开(公告)号：US20240411465A1

公开(公告)日：2024-12-12

申请号：US18812165

申请日：2024-08-22

Applicant: Micron Technology, Inc.

Inventor： Marco REDAELLI ,  Gaurav SINHA

IPC: G06F3/06

Abstract: Implementations described herein relate to selective data map unit access. A memory device may receive a request from a host device to access a resource associated with a data map unit. The memory device may identify whether the data map unit is in a locked state or an unlocked state. The data map unit may be in the locked state when another host device currently has exclusive access to the resource or may be in the unlocked state when no other host device currently has exclusive access to the resource. The memory device may selectively grant the host device exclusive access to the resource based on identifying whether the data map unit is in the locked state or the unlocked state.

公开(公告)号：US20240176506A1

公开(公告)日：2024-05-30

申请号：US18511304

申请日：2023-11-16

Applicant: Micron Technology , Inc.

Inventor： Marco REDAELLI

IPC: G06F3/06

CPC classification number: G06F3/0619 ,  G06F3/0634 ,  G06F3/0659 ,  G06F3/0673

Abstract: Implementations described herein relate to memory device initiated low temperature thermal throttling. A memory device may receive, from a host device, low temperature thermal throttling information that enables a thermal throttling operation by the memory device. The low temperature thermal throttling information may include an indication of a temperature threshold or a time for performing the thermal throttling operation. The memory device may perform the thermal throttling operation based on moving dummy data from a controller associated with the memory device to a particular location of the memory device associated with the thermal throttling operation. The memory device may complete the thermal throttling operation based on the temperature of the memory device satisfying the temperature threshold.

公开(公告)号：US20240176498A1

公开(公告)日：2024-05-30

申请号：US18511343

申请日：2023-11-16

Applicant: Micron Technology, Inc.

Inventor： Marco REDAELLI

IPC: G06F3/06

CPC classification number: G06F3/0614 ,  G06F3/0655 ,  G06F3/0679

Abstract: Implementations described herein relate to host device initiated low temperature thermal throttling. A memory device may receive, from a host device, a low temperature thermal throttling command that indicates for the memory device to initiate a thermal throttling operation based on a temperature of the memory device not satisfying a temperature threshold. The low temperature thermal throttling command may indicate an amount of dummy data to be moved from the host device to a particular location of the memory device associated with the thermal throttling operation. The memory device may perform the thermal throttling operation based on moving the dummy data from the host device to the particular location of the memory device. The memory device may complete the thermal throttling operation based on moving the amount of data from the host device to the particular location of the memory device.

公开(公告)号：US20240168539A1

公开(公告)日：2024-05-23

申请号：US18511408

申请日：2023-11-16

Applicant: Micron Technology, Inc.

Inventor： Marco REDAELLI

IPC: G06F1/3234 ,  G06F1/3212 ,  G06F12/02 ,  G06F12/0891

CPC classification number: G06F1/3275 ,  G06F1/3212 ,  G06F12/0246 ,  G06F12/0891

Abstract: Implementations described herein relate to abrupt shutdown and abrupt power loss management. In some implementations, a memory device may receive a reset signal and may perform an abrupt shutdown operation based on receiving the reset signal. For example, the memory device may perform a cache flush and a write protect operation. In some other implementations, the memory device may receive a reset signal and may perform an abrupt power loss operation based on receiving the reset signal. For example, the memory device may perform a write protect operation and a flash translation layer stand-by operation. The memory device may initiate a reduced power consumption state of the memory device based on a completion of the abrupt shutdown operation or the abrupt power loss operation.

公开(公告)号：US20240289159A1

公开(公告)日：2024-08-29

申请号：US18586008

申请日：2024-02-23

Applicant: Micron Technology, Inc.

Inventor： Gaurav SINHA ,  Marco REDAELLI

IPC: G06F9/455 ,  G06F8/61

CPC classification number: G06F9/45558 ,  G06F8/61 ,  G06F2009/45562 ,  G06F2009/45579

Abstract: Implementations described herein relate to memory device virtualization. In some implementations, a memory device may perform a boot-up of the memory device and may receive configuration information associated with a single root input-output virtualization for the memory device. The memory device may store the configuration information in a memory of the memory device. The memory device may perform a subsequent boot-up of the memory device. The memory device may retrieve the configuration information from the memory of the memory device after performing the subsequent boot-up of the memory device. The memory device may initiate one or more virtual functions associated with the single root input-output virtualization based on retrieving the configuration information from the memory of the memory device.

公开(公告)号：US20240289056A1

公开(公告)日：2024-08-29

申请号：US18588744

申请日：2024-02-27

Applicant: Micron Technology Inc.

Inventor： Marco REDAELLI ,  Daniela RUGGERI

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/0679

Abstract: In some implementations, a memory device may include a memory and a controller. The controller may receive, from a host device, a read-verify command. The controller may obtain, from the memory, a chunk of data based on the read-verify command. The controller may verify, based on the read-verify command, the chunk of data without transferring the chunk of data to the host device. The controller may provide, to the host device, an indication of a pass-fail status of the chunk of data based on the verification of the chunk of data.

公开(公告)号：US20240288480A1

公开(公告)日：2024-08-29

申请号：US18587128

申请日：2024-02-26

Applicant: Micron Technology, Inc.

Inventor： Marco REDAELLI

IPC: G01R31/01 ,  G01R27/26

CPC classification number: G01R31/016 ,  G01R27/2688

Abstract: Implementations described herein relate to a capacitor test. In some implementations, a system may include a memory device, one or more capacitors located externally to the memory device, and one or more components configured to initiate a capacitor test for the one or more capacitors. The one or more components may be configured to perform an iteration of the capacitor test for the one or more capacitors, wherein performing the iteration of the capacitor test comprises waiting a time period, increasing a discharge time, reading a counter associated with the capacitor test, and determining whether a value of the counter has increased. The one or more components may be configured to perform another iteration of the capacitor test or terminate the capacitor test based on determining whether the value of the counter has increased.

公开(公告)号：US20240264753A1

公开(公告)日：2024-08-08

申请号：US18436746

申请日：2024-02-08

Applicant: Micron Technology, Inc.

Inventor： Gianluca COPPOLA ,  Marco REDAELLI

IPC: G06F3/06

CPC classification number: G06F3/0625 ,  G06F3/0653 ,  G06F3/0679

Abstract: In some implementations, a memory device may receive, from a host device, a host configuration that includes an indication of a set of thermal throttling threshold values, wherein the set of thermal throttling threshold values are from a list of sets of valid thermal throttling threshold values. The memory device may send, to the host device, an indication of a set of maximum current consumption values for the memory device, wherein the set of maximum current consumption values is based on the host configuration. The memory device may apply a thermal throttling based on the host configuration.