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    Automated test apparatus for testing risk and integrity of pharmaceutical filtration membranes and method thereof
    3.
    发明申请
    Automated test apparatus for testing risk and integrity of pharmaceutical filtration membranes and method thereof 有权
    用于测试药物过滤膜的风险和完整性的自动化试验装置及其方法

    公开(公告)号：US20150033828A1

    公开(公告)日：2015-02-05

    申请号：US13956375

    申请日：2013-08-01

    申请人： Ming-Hsin Li ,  Shu-Pei Chiu ,  Chih-Hsien Chang ,  Te-Wei Lee

    发明人： Ming-Hsin Li ,  Shu-Pei Chiu ,  Chih-Hsien Chang ,  Te-Wei Lee

    IPC分类号： G01N15/08

    CPC分类号： B01D65/102 ,  B01D65/10 ,  G01M3/06

    摘要： An automated test apparatus for risk and integrity testing for pharmaceutical filtration membranes, including at least the following components: a liquid injection inlet, a pump, a fluid pressure gauge, a gas pressure gauge, a plurality of solenoid valves, a plurality of membranes, a gas pressure regulator valve, a pharmaceutical product bottle, and a bubble generation bottle. The automated test apparatus of the present invention is controlled by computer software in connection with an automatic pharmaceutical synthesis apparatus for automated testing. In use of the automated test apparatus of the present invention, it needs only to start the operating system of the automated test apparatus for membrane risk and integrity test after the completion of the automatic pharmaceutical synthesis. The membrane risk and integrity test can be accomplished in a short time by measuring pressures of gas and liquid with pressure gauges deposed online concurrently.

    摘要翻译： 一种用于药物过滤膜的风险和完整性测试的自动测试装置，包括至少以下组件：液体注射入口，泵，流体压力计，气体压力计，多个电磁阀，多个膜， 气体压力调节阀，药品瓶和气泡生成瓶。 本发明的自动测试装置由计算机软件与用于自动化测试的自动药物合成装置有关。 在使用本发明的自动测试装置时，仅需要在自动药物合成完成之后启动用于膜风险和完整性测试的自动测试装置的操作系统。 薄膜风险和完整性测试可以在短时间内通过测量气体和液体的压力同时在线排出的压力计来完成。

    Automated synthesis device to produce Re-188-Liposome and method thereof
    4.
    发明申请
    Automated synthesis device to produce Re-188-Liposome and method thereof 审中-公开
    自动合成装置生产Re-188-脂质体及其方法

    公开(公告)号：US20140377169A1

    公开(公告)日：2014-12-25

    申请号：US13921217

    申请日：2013-06-19

    申请人： Ming-Hsin Li ,  Shu-Pei Chiu ,  Chih-Hsien Chang ,  Te-Wei Lee

    发明人： Ming-Hsin Li ,  Shu-Pei Chiu ,  Chih-Hsien Chang ,  Te-Wei Lee

    IPC分类号： B01J19/00 ,  A61K51/12

    CPC分类号： B01J19/004 ,  A61K51/1234 ,  C07B59/001

    摘要： An automated synthesis device to produce Re-188-BMEDA solution including: a plurality of reagent vials, three-way solenoid valves, gel filtration columns and micro pumps, and a reaction vial, a product vial, a temporary storage vial, a filter membrane, and a waste vial, wherein the plurality of reagent vials include first reagent vial and second reagent vials being connected to the reaction vial through first micro pump, the third reagent vial and fourth reagent vial being connected to the reaction vial through second micro pump, fifth reagent vial being connected to the reaction vial through third micro pump, and sixth reagent vial being connected to the temporary storage vial through fourth micro pump, wherein the reaction vial is connected to the plurality of gel filtration columns through the micro-pump, respectively. The automated synthesis device is operable with program to upgrade yield and avoid contamination.

    摘要翻译： 一种用于生产Re-188-BMEDA溶液的自动化合成装置，包括：多个试剂瓶，三通电磁阀，凝胶过滤柱和微型泵，以及反应瓶，产品小瓶，临时储存小瓶，过滤膜 以及废物小瓶，其中所述多个试剂小瓶包括通过第一微泵连接到所述反应小瓶的第一试剂小瓶和第二试剂小瓶，所述第三试剂小瓶和第四试剂小瓶通过第二微泵连接到所述反应小瓶， 第五试剂小瓶通过第三微泵连接到反应小瓶，第六试剂小瓶通过第四微泵连接到临时存储小瓶，其中反应小瓶分别通过微型泵连接到多个凝胶过滤柱 。 自动合成装置可与程序一起操作，以提高产量并避免污染。

    Automated test apparatus for testing risk and integrity of pharmaceutical filtration membranes and method thereof
    5.
    发明授权
    Automated test apparatus for testing risk and integrity of pharmaceutical filtration membranes and method thereof 有权

    公开(公告)号：US09707521B2

    公开(公告)日：2017-07-18

    申请号：US13956375

    申请日：2013-08-01

    申请人： Ming-Hsin Li ,  Shu-Pei Chiu ,  Chih-Hsien Chang ,  Te-Wei Lee

    发明人： Ming-Hsin Li ,  Shu-Pei Chiu ,  Chih-Hsien Chang ,  Te-Wei Lee

    IPC分类号： B01D65/10 ,  G01M3/06

    CPC分类号： B01D65/102 ,  B01D65/10 ,  G01M3/06

    摘要： An automated test apparatus for risk and integrity testing for pharmaceutical filtration membranes, including at least the following components: a liquid injection inlet, a pump, a fluid pressure gauge, a gas pressure gauge, a plurality of solenoid valves, a plurality of membranes, a gas pressure regulator valve, a pharmaceutical product bottle, and a bubble generation bottle. The automated test apparatus of the present invention is controlled by computer software in connection with an automatic pharmaceutical synthesis apparatus for automated testing. In use of the automated test apparatus of the present invention, it needs only to start the operating system of the automated test apparatus for membrane risk and integrity test after the completion of the automatic pharmaceutical synthesis. The membrane risk and integrity test can be accomplished in a short time by measuring pressures of gas and liquid with pressure gauges deposed online concurrently.

    Skew sensitive calculation for misalignment from multi patterning
    7.
    发明授权
    Skew sensitive calculation for misalignment from multi patterning 有权
    对多图案化的偏移的偏移计算

    公开(公告)号：US08589831B1

    公开(公告)日：2013-11-19

    申请号：US13561189

    申请日：2012-07-30

    申请人： Chih-Hsien Chang ,  Min-Shueh Yuan ,  Tsung-Hsien Tsai

    发明人： Chih-Hsien Chang ,  Min-Shueh Yuan ,  Tsung-Hsien Tsai

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5068

    摘要： Some aspects of the present disclosure provide for a method of accurately simulating variations in an operating parameter, due to processing variations caused by a multi-patterning exposure, by reducing the impact of layout sections having a large width and spacing. The method assigns a skew sensitive index to one or more sections of a multi-patterning layer formed with a first mask. Runlengths of the one or more sections are respectively multiplied by an assigned skew sensitive index to determine a skew variation for each of the one or more sections. The overall skew variation sum is then determined by summing the skew variation for each of the one or more sections. By separately determining the effects of processing variations (e.g., mask misalignment) for different sections of a multi-patterning layer, an accurate measurement of operating parameter variations is achieved.

    摘要翻译： 本公开的一些方面提供了通过减小​​具有大的宽度和间隔的布局部分的影响，由于由多图案化曝光引起的处理变化，准确地模拟操作参数的变化的方法。 该方法为由形成有第一掩模的多图案化层的一个或多个部分分配偏斜敏感指数。 一个或多个部分的运行长度分别乘以一个分配的偏移敏感指数，以确定一个或多个部分中的每个部分的偏斜变化。 然后通过对一个或多个部分中的每一个的偏斜变化求和来确定总体偏差变化和。 通过分别确定多图案化层的不同部分的处理变化（例如，掩模未对准）的影响，实现了操作参数变化的精确测量。

    Over stress verify design rule check
    8.
    发明授权
    Over stress verify design rule check 有权
    过压力验证设计规则检查

    公开(公告)号：US08510701B2

    公开(公告)日：2013-08-13

    申请号：US13350894

    申请日：2012-01-16

    申请人： Chen-Ting Ko ,  Chih-Hsien Chang ,  Yung-Chow Peng

    发明人： Chen-Ting Ko ,  Chih-Hsien Chang ,  Yung-Chow Peng

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5045 ,  G06F2217/78

    摘要： Some aspects of this disclosure provide for electronic design automation (EDA) techniques that check whether individual blocks, such as transistors or other semiconductor devices, are connected to their correct power domains during design. In this way, the disclosed EDA techniques can limit or prevent overstress conditions applied to blocks and help to improve reliability of integrated circuits, when manufactured.

    摘要翻译： 本公开的一些方面提供了电子设计自动化（EDA）技术，其在设计期间检查诸如晶体管或其他半导体器件的各个块是否连接到其正确的电源域。 以这种方式，所公开的EDA技术可以限制或防止在制造时应用于块的过应力条件并有助于提高集成电路的可靠性。

    Multi-phase clock generator and data transmission lines
    9.
    发明授权
    Multi-phase clock generator and data transmission lines 有权
    多相时钟发生器和数据传输线

    公开(公告)号：US08482332B2

    公开(公告)日：2013-07-09

    申请号：US13089160

    申请日：2011-04-18

    申请人： Yung-Chow Peng ,  Min-Shueh Yuan ,  Chih-Hsien Chang

    发明人： Yung-Chow Peng ,  Min-Shueh Yuan ,  Chih-Hsien Chang

    IPC分类号： H03K3/00

    CPC分类号： H03K5/15066 ,  H03K5/133 ,  H03K2005/00058 ,  H03L7/06

    摘要： An embodiment is an integrated circuit. The integrated circuit comprises a clock generator and data transmission lines. The clock generator generates clock signals. At least some of the clock signals have a phase difference from an input clock signal input into the clock generator, and at least some of the clock signals have a different phase difference with respect to at least another of the clock signals. Each of the data transmission lines is triggered at least in part by at least one of the clock signals.

    摘要翻译： 实施例是集成电路。 集成电路包括时钟发生器和数据传输线。 时钟发生器产生时钟信号。 至少一些时钟信号具有与输入到时钟发生器的输入时钟信号的相位差，并且至少一些时钟信号相对于至少另一个时钟信号具有不同的相位差。 至少部分地通过至少一个时钟信号来触发每个数据传输线。

    I/O cell architecture
    10.
    发明授权
    I/O cell architecture 有权
    I / O单元架构

    公开(公告)号：US08302060B2

    公开(公告)日：2012-10-30

    申请号：US12947938

    申请日：2010-11-17

    申请人： Renjeng Chiang ,  Chih-Hsien Chang

    发明人： Renjeng Chiang ,  Chih-Hsien Chang

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5072 ,  G06F2217/40

    摘要： A system includes a computer readable storage medium and a processor. The computer readable storage includes data representing an input/output (“I/O”) cell of a first type for modeling and/or fabricating a semiconductor device. The I/O cell of the first type includes circuitry for providing a first plurality of functions. The processor is in communication with the computer readable storage medium and is configured to select the I/O cell of the first type, arrange a plurality of the I/O cells of the first type on a model of an semiconductor device, and store the model of the semiconductor device including the plurality of the I/O cells of the first type in the computer readable storage medium.

    摘要翻译： 系统包括计算机可读存储介质和处理器。 计算机可读存储器包括表示用于建模和/或制造半导体器件的第一类型的输入/输出（I / O）单元的数据。 第一类型的I / O单元包括用于提供第一多个功能的电路。 处理器与计算机可读存储介质通信，并且被配置为选择第一类型的I / O单元，将第一类型的多个I / O单元布置在半导体器件的型号上，并存储 包括计算机可读存储介质中第一类型的多个I / O单元的半导体器件的型号。