公开(公告)号：US20100053516A1

公开(公告)日：2010-03-04

申请号：US12330115

申请日：2008-12-08

申请人： Ming-Hung LU ,  Sheng-Han TSAI ,  Chien-Hung CHEN

发明人： Ming-Hung LU ,  Sheng-Han TSAI ,  Chien-Hung CHEN

IPC分类号： G02F1/1335

CPC分类号： G02F1/133555 ,  G02F1/133514 ,  G02F2001/133557

摘要： A transflective layer is inserted in between a light modulator and a specific-color reflector to allow partial transmission and partial reflection of the light transmitted through the light modulator. The specific-color reflector is arranged to reflect a light component of a designated color of the transmitted light.

摘要翻译： 半透反射层插入在光调制器和特定颜色反射器之间，以允许透射通过光调制器的光的部分透射和部分反射。 特定颜色反射器被布置成反射透射光的指定颜色的光分量。

公开(公告)号：US20130185689A1

公开(公告)日：2013-07-18

申请号：US13352738

申请日：2012-01-18

申请人： Chien-Hung CHEN ,  Yung-Chow PENG ,  Chung-Hui CHEN ,  Chih Ming YANG

发明人： Chien-Hung CHEN ,  Yung-Chow PENG ,  Chung-Hui CHEN ,  Chih Ming YANG

IPC分类号： G06F17/50

CPC分类号： G06F17/5081 ,  G06F17/5009 ,  G06F2217/02 ,  G06F2217/06 ,  G06F2217/08 ,  G06F2217/12 ,  H01L27/0207 ,  H01L29/94

摘要： A method of generating an optimized layout of semiconductor components in conformance with a set of design rules includes generating, for a unit cell including one or more semiconductor components, a plurality of configurations each of which satisfies some, but not all, of the design rules. For each configuration, it is checked whether a layout, which is a repeating pattern of the unit cell, satisfies the remaining design rules. Among the configurations which satisfy all of the design rules, the configuration providing an optimal value of a property is selected for generating the optimized layout of the semiconductor components.

摘要翻译： 根据一组设计规则生成半导体部件的优化布局的方法包括为包括一个或多个半导体部件的单元单元生成多个配置，每个配置满足设计规则的一些但不是全部 。 对于每个配置，检查作为单位单元的重复图案的布局是否满足剩余的设计规则。 在满足所有设计规则的配置中，选择提供最佳的属性值的配置用于生成半导体部件的优化布局。

公开(公告)号：US20110221494A1

公开(公告)日：2011-09-15

申请号：US12719951

申请日：2010-03-09

申请人： Chien-Hung CHEN ,  Mao-Hsuan CHOU ,  Tsung-Hsien TSAI

发明人： Chien-Hung CHEN ,  Mao-Hsuan CHOU ,  Tsung-Hsien TSAI

IPC分类号： H03L7/08

CPC分类号： H03L3/00 ,  H03L7/101

摘要： A phase-locked loop (PLL) circuit includes a voltage-controlled oscillator (VCO) having a VCO input for receiving a control voltage and a VCO output, a feedback loop between the VCO input and the VCO output, and a start-up circuit having a start-up circuit input and a start-up circuit output. The start-up circuit output is coupled to the VCO input and the start-up circuit input is coupled to the VCO output. The start-up circuit provides a voltage at its start-up circuit output during a start-up phase, which terminates after a predetermined number of feedback pulses are detected by the start-up circuit.

摘要翻译： 锁相环（PLL）电路包括具有用于接收控制电压和VCO输出的VCO输入的压控振荡器（VCO），VCO输入和VCO输出之间的反馈环路，以及启动电路 具有启动电路输入和启动电路输出。 启动电路输出耦合到VCO输入，启动电路输入耦合到VCO输出。 启动电路在启动阶段在其起动电路输出端提供电压，在起动电路检测到预定数量的反馈脉冲之后终止该电压。

公开(公告)号：US20130135843A1

公开(公告)日：2013-05-30

申请号：US13534229

申请日：2012-06-27

申请人： Chien-Hung CHEN ,  Ying-Chih Pan

发明人： Chien-Hung CHEN ,  Ying-Chih Pan

IPC分类号： F21V8/00

CPC分类号： G02B6/008

摘要： A light guide plate structure is provided. The light guide plate structure includes a plurality of light guide pieces and a plurality of reflectors. Each of the light guide pieces including two inclined surfaces parallel to each other, and the light guide pieces are spliced at their inclined surfaces. The reflectors are disposed between the inclined surfaces. A backlight module using the light guide plate is also provided

摘要翻译： 提供导光板结构。 导光板结构包括多个导光片和多个反射器。 每个导光件包括彼此平行的两个倾斜表面，并且导光片在其倾斜表面处接合。 反射器设置在倾斜表面之间。 还提供了使用导光板的背光模块

公开(公告)号：US20180228818A1

公开(公告)日：2018-08-16

申请号：US15516152

申请日：2015-10-01

申请人： Chien-Hung CHEN ,  ALS MOUNTAIN LLC

发明人： Chien-Hung CHEN

IPC分类号： A61K31/616 ,  A61K31/155 ,  A61K31/4045 ,  A61K47/34 ,  A61K47/10

CPC分类号： A61K31/616 ,  A61K9/0019 ,  A61K31/155 ,  A61K31/4045 ,  A61K47/10 ,  A61K47/34 ,  A61K2300/00

摘要： The present invention is based on the unexpected discovery that a combination of certain known drugs exhibits synergistic effects in treating metabolic syndrome and various other diseases. In particular, the invention comprises a pharmaceutical composition comprising: (1) a therapeutically effective quantity of a first agent that is Metformin or a salt thereof; (2) a therapeutically effective quantity of a second agent that is Aspirin; (3) a therapeutically effective quantity of a third agent that serotonin creatinine sulfate complex; (4) a non-ionic surfactant; and (5) a solvent that is a lower alkanol. A preferred composition comprises metformin hydrochloride, aspirin, and serotonin creatinine sulfate complex for the first, second, and third agents. The invention further comprises methods for the use of these compositions for the treatment of metabolic syndrome, hyperproliferative diseases including cancer, and other diseases and conditions.

公开(公告)号：US20130225000A1

公开(公告)日：2013-08-29

申请号：US13404727

申请日：2012-02-24

申请人： Chien-Hung CHEN ,  Chih-Wei TU ,  Yuan-Yao TU ,  Wei-Syuan LIN ,  Pei-Hao HUANG ,  Ping-Huang YANG

发明人： Chien-Hung CHEN ,  Chih-Wei TU ,  Yuan-Yao TU ,  Wei-Syuan LIN ,  Pei-Hao HUANG ,  Ping-Huang YANG

IPC分类号： H01R13/66

CPC分类号： H01R24/58 ,  H01R13/187 ,  H01R13/641 ,  H01R13/703 ,  H01R2107/00

摘要： An audio jack for receiving an audio plug includes a connection hole with a position detection portion and a first audio channel contact portion therein. When the audio plug is inserted into the connection hole to the linking position, a first audio channel connection portion of the audio plug contacts the position detection portion and the first audio channel contact portion. The position detection portion and the first audio channel contact portion respectively have a first distance and a second distance to an opening of the connection hole, wherein the second distance is smaller than the first distance.

摘要翻译： 用于接收音频插头的音频插孔包括其中具有位置检测部分和第一音频通道接触部分的连接孔。 当音频插头插入到连接位置的连接孔中时，音频插头的第一音频通道连接部分接触位置检测部分和第一音频通道接触部分。 位置检测部分和第一音频通道接触部分别具有与连接孔的开口的第一距离和第二距离，其中第二距离小于第一距离。

公开(公告)号：US20120020548A1

公开(公告)日：2012-01-26

申请号：US12948957

申请日：2010-11-18

申请人： Meng-Chao KAO ,  Chien-Hung CHEN ,  Tzu-Chiang SHEN

发明人： Meng-Chao KAO ,  Chien-Hung CHEN ,  Tzu-Chiang SHEN

IPC分类号： G06K9/00

CPC分类号： G06T15/205 ,  H04N13/261

摘要： The present invention provides a method for generating images of multi-views. The method includes obtaining a 2D original image of an article and background figures of multi-views; calculating the background image range and the main body image range of the 2D original image of the article; cutting the main body image out; generating a depth model according to an equation; cutting the depth model according to the main body image range of the cut 2D image of the article; shifting every pixel in the main body image of the 2D original image of the article according to the cut depth model to obtain shifted main body images of multi-views; and synthesizing the shifted main body images of multi-views and the background figures of multi-views to obtain the final images of multi-views for 3D image reconstruction.

摘要翻译： 本发明提供一种生成多视图图像的方法。 该方法包括获得文章的2D原始图像和多视图的背景图; 计算文章的2D原始图像的背景图像范围和主体图像范围; 切割主体图像; 根据等式生成深度模型; 根据文章切割2D图像的主体图像范围切割深度模型; 根据切割深度模型移动物品的2D原始图像的主体图像中的每个像素，以获得多视角的偏移主体图像; 并合成多视角的偏移主体图像和多视点的背景图，以获得用于3D图像重建的多视图的最终图像。

公开(公告)号：US20130187686A1

公开(公告)日：2013-07-25

申请号：US13569568

申请日：2012-08-08

申请人： Min-Shueh YUAN ,  Chien-Hung CHEN ,  Shao-Yu LI

发明人： Min-Shueh YUAN ,  Chien-Hung CHEN ,  Shao-Yu LI

IPC分类号： H03B19/12 ,  H03K19/096

CPC分类号： H03K3/0375

摘要： In response to a first level of the clock signal, an inverting output of a flip-flop circuit is connected, via a non-inverting input thereof, to a first intermediate node of the flip-flop circuit and a non-inverting output of the flip-flop circuit is connected, via an inverting input thereof, to a second intermediate node of the flip-flop circuit. In response to a second level of the clock signal, the first intermediate node is connected, via a third intermediate node of the flip-flop circuit, to the non-inverting output and the second intermediate node is connected, via a fourth intermediate node of the flip-flop circuit, to the inverting output. A first cross-coupled gates arrangement of the flip-flop circuit is coupled between the first and second intermediate nodes. A second cross-coupled gates arrangement of the flip-flop circuit is coupled between the third and fourth intermediate nodes.

摘要翻译： 响应于第一级时钟信号，触发器电路的反相输出经由其非反相输入连接到触发器电路的第一中间节点，并且该反相输出端 触发器电路经由其反相输入连接到触发器电路的第二中间节点。 响应于时钟信号的第二电平，第一中间节点经由触发器电路的第三中间节点连接到非反相输出端，并且第二中间节点经由第四中间节点 触发器电路，到反相输出。 触发器电路的第一交叉耦合门装置耦合在第一和第二中间节点之间。 触发器电路的第二交叉耦合栅极布置耦合在第三和第四中间节点之间。

公开(公告)号：US20120268357A1

公开(公告)日：2012-10-25

申请号：US13417042

申请日：2012-03-09

申请人： Ming-Chia SHIH ,  Chih-Ting CHEN ,  Chien-Hung CHEN ,  Hsin-Yu LEE ,  Hsin-Cheng HUNG

发明人： Ming-Chia SHIH ,  Chih-Ting CHEN ,  Chien-Hung CHEN ,  Hsin-Yu LEE ,  Hsin-Cheng HUNG

IPC分类号： G09G3/36

CPC分类号： G09G3/3607 ,  G09G3/3614 ,  G09G3/3648 ,  G09G2300/0452 ,  G09G2300/0465 ,  G09G2320/0242

摘要： The invention provides a display panel. The display panel includes a plurality of pixels. Each pixel includes a first color sub-pixel, a second color sub-pixel, a third color sub-pixel, and a fourth color sub-pixel, and the first color sub-pixel consists of a light region and a dark region.

摘要翻译： 本发明提供一种显示面板。 显示面板包括多个像素。 每个像素包括第一颜色子像素，第二彩色子像素，第三颜色子像素和第四颜色子像素，并且第一颜色子像素由亮区域和暗区域组成。

公开(公告)号：US20120018795A1

公开(公告)日：2012-01-26

申请号：US12843093

申请日：2010-07-26

申请人： Chien-Hung CHEN ,  Tzu-Ping Chen ,  Yu-Jen Chang

发明人： Chien-Hung CHEN ,  Tzu-Ping Chen ,  Yu-Jen Chang

IPC分类号： H01L29/792 ,  H01L21/336

CPC分类号： H01L29/792 ,  H01L21/28282 ,  H01L27/11573 ,  H01L29/4234 ,  H01L29/66833

摘要： A manufacturing method of a non-volatile memory is disclosed. A gate structure is formed on a substrate and includes a gate dielectric layer and a gate conductive layer. The gate dielectric layer is partly removed, thereby a symmetrical opening is formed among the gate conductive layer, the substrate and the gate dielectric layer, and a cavity is formed on end sides of the gate dielectric layer. A first oxide layer is formed on a sidewall and bottom of the gate conductive layer, and a second oxide layer is formed on a surface of the substrate. A nitride material layer is formed covering the gate structure, the first and second oxide layer and the substrate and filling the opening. An etching process is performed to partly remove the nitride material layer, thereby a nitride layer is formed on a sidewall of the gate conductive layer and extending into the opening.

摘要翻译： 公开了一种非易失性存储器的制造方法。 栅极结构形成在衬底上，并且包括栅极介电层和栅极导电层。 部分地去除栅介质层，从而在栅极导电层，基板和栅极电介质层之间形成对称的开口，并且在栅极电介质层的端侧形成空腔。 在栅极导电层的侧壁和底部上形成第一氧化物层，并且在衬底的表面上形成第二氧化物层。 形成覆盖栅极结构，第一和第二氧化物层和衬底并填充开口的氮化物材料层。 执行蚀刻处理以部分地去除氮化物材料层，由此在栅极导电层的侧壁上形成并延伸到开口中的氮化物层。