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    Forming method of ferroelectric capacitor and manufacturing method of semiconductor device
    2.
    发明申请
    Forming method of ferroelectric capacitor and manufacturing method of semiconductor device 审中-公开
    铁电电容器的形成方法和半导体器件的制造方法

    公开(公告)号：US20070122917A1

    公开(公告)日：2007-05-31

    申请号：US11407207

    申请日：2006-04-20

    申请人： Mitsushi Fujiki ,  Kenkichi Suezawa ,  Makoto Takahashi ,  Ko Nakamura ,  Wensheng Wang

    发明人： Mitsushi Fujiki ,  Kenkichi Suezawa ,  Makoto Takahashi ,  Ko Nakamura ,  Wensheng Wang

    IPC分类号： H01L21/00 ,  H01L21/8242

    CPC分类号： H01L27/11507 ,  H01L27/11502 ,  H01L28/55 ,  H01L28/65

    摘要： Disclosed is a ferroelectric capacitor forming method of allowing a FeRAM to be stably mass-produced. In forming the ferroelectric capacitor for the FeRAM, a PZT layer is formed on a lower electrode layer by a sputtering method. Then, a first RTA treatment for crystallizing the PZT is performed in an environment controlled such that predetermined capacitor performance such as a data holding property can be obtained regardless of the amount of a target previously used (used hours) in the sputtering method. For example, the O2 gas flow rate is controlled in an appropriate range during the first RTA treatment. Thereafter, formation of an upper electrode layer or a second RTA treatment is performed. As a result, the ferroelectric capacitor having predetermined capacitor performance can be formed with high yield, so that the FeRAM can be stably mass-produced.

    摘要翻译： 公开了一种允许稳定批量生产FeRAM的铁电电容器形成方法。 在形成FeRAM的铁电电容器时，通过溅射法在下电极层上形成PZT层。 然后，在控制环境中进行用于结晶PZT的第一RTA处理，使得可以获得诸如数据保持特性的预定电容器性能，而与溅射方法中先前使用的目标量（使用时数）无关。 例如，在第一次RTA处理期间将O 2气体流量控制在适当的范围内。 此后，进行上电极层的形成或第二RTA处理。 结果，可以以高产率形成具有预定电容器性能的铁电电容器，从而可以稳定地批量生产FeRAM。

    Semiconductor device and method of manufacturing the same
    4.
    发明授权
    Semiconductor device and method of manufacturing the same 失效
    半导体装置及其制造方法

    公开(公告)号：US07221015B2

    公开(公告)日：2007-05-22

    申请号：US10388596

    申请日：2003-03-17

    申请人： Takashi Ando ,  Jiro Miura ,  Yukinobu Hikosaka ,  Akio Itoh ,  Junichi Watanabe ,  Kenkichi Suezawa

    发明人： Takashi Ando ,  Jiro Miura ,  Yukinobu Hikosaka ,  Akio Itoh ,  Junichi Watanabe ,  Kenkichi Suezawa

    IPC分类号： H01L27/108 ,  H01L29/76

    CPC分类号： H01L27/11502 ,  H01L27/11507 ,  H01L28/55

    摘要： There are contained first and second conductive plugs formed in first insulating layer, an island-like oxygen-barrier metal layer for covering the first conductive plug, an oxidation-preventing insulating layer formed on the first insulating layer to cover side surfaces of the oxygen-barrier metal layer, a capacitor having a lower electrode formed on the oxygen-barrier metal layer and the oxidation-preventing insulating layer, a dielectric layer formed on the lower electrode, and an upper electrode formed on the dielectric layer, a second insulating layer for covering the capacitor and the oxidation-preventing insulating layer, a third hole formed in respective layers from the second insulating layer to the oxidation-preventing insulating layer on the second conductive plug, and a third conductive plug formed in the third hole and connected to the second conductive plug.

    摘要翻译： 存在形成在第一绝缘层中的第一和第二导电插塞，用于覆盖第一导电插塞的岛状氧阻隔金属层，形成在第一绝缘层上的氧化防止绝缘层，以覆盖氧 - 阻挡金属层，形成在氧阻隔金属层上的下电极的电容器和防氧化绝缘层，形成在下电极上的电介质层和形成在电介质层上的上电极，第二绝缘层， 覆盖电容器和防氧化绝缘层，形成在第二绝缘层到第二导电插塞上的防氧化绝缘层的各层中的第三孔和形成在第三孔中并连接到第三导电插塞的第三导电插塞 第二导电插头。

    Semiconductor device and method of manufacturing the same
    5.
    发明授权
    Semiconductor device and method of manufacturing the same 有权

    公开(公告)号：US07139161B2

    公开(公告)日：2006-11-21

    申请号：US10831178

    申请日：2004-04-26

    申请人： Genichi Komuro ,  Kenkichi Suezawa

    发明人： Genichi Komuro ,  Kenkichi Suezawa

    IPC分类号： H01G4/06

    CPC分类号： H01L27/11502 ,  H01L21/31122 ,  H01L21/31144 ,  H01L21/32136 ,  H01L21/32139 ,  H01L27/10811 ,  H01L27/11507 ,  H01L28/55

    摘要： There are provides the steps of forming sequentially a first conductive film, a dielectric film, and a second conductive film on an insulating film, forming a first film on the second conductive film, forming a second film made of insulating material on the first film, forming hard masks by patterning the second film and the first film into a capacitor planar shape, etching the second conductive film and the dielectric film in a region not covered with the hard masks, etching the first conductive film in the region not covered with the hard masks up to a depth that does not expose the insulating film, removing the second film constituting the hard masks by etching, etching a remaining portion of the first conductive film in the region not covered with the hard masks to the end, and removing the first film.

    Semiconductor device and method of manufacturing the same
    7.
    发明授权
    Semiconductor device and method of manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号：US06746878B2

    公开(公告)日：2004-06-08

    申请号：US10352930

    申请日：2003-01-29

    申请人： Genichi Komuro ,  Kenkichi Suezawa

    发明人： Genichi Komuro ,  Kenkichi Suezawa

    IPC分类号： H01L2100

    CPC分类号： H01L27/11502 ,  H01L21/31122 ,  H01L21/31144 ,  H01L21/32136 ,  H01L21/32139 ,  H01L27/10811 ,  H01L27/11507 ,  H01L28/55

    摘要： There are provides the steps of forming sequentially a first conductive film, a dielectric film, and a second conductive film on an insulating film, forming a first film on the second conductive film, forming a second film made of insulating material on the first film, forming hard masks by patterning the second film and the first film into a capacitor planar shape, etching the second conductive film and the dielectric film in a region not covered with the hard masks, etching the first conductive film in the region not covered with the hard masks up to a depth that does not expose the insulating film, removing the second film constituting the hard masks by etching, etching a remaining portion of the first conductive film in the region not covered with the hard masks to the end, and removing the first film.

    摘要翻译： 提供了在绝缘膜上依次形成第一导电膜，电介质膜和第二导电膜的步骤，在第二导电膜上形成第一膜，在第一膜上形成由绝缘材料制成的第二膜， 通过将第二膜和第一膜图案化​​成电容器平面形状来形成硬掩模，在未被硬掩模覆盖的区域中蚀刻第二导电膜和电介质膜，在未被硬覆盖的区域中蚀刻第一导电膜 掩模到不暴露绝缘膜的深度，通过蚀刻去除构成硬掩模的第二膜，在未被硬掩模覆盖的区域中蚀刻第一导电膜的剩余部分至末端，以及去除第一 电影。