公开(公告)号：US20030029492A1

公开(公告)日：2003-02-13

申请号：US09928581

申请日：2001-08-13

Applicant: Motorola, Inc.

Inventor： Jun Wang ,  Daniel S. Marshall

IPC: H01L035/00 ,  H01L037/00 ,  H01L035/14

CPC classification number: H01L35/34 ,  H01L35/22

Abstract: A thermoelectric material comprising a Group IV element boride doped with one of the Group III, IV, or V elements, wherein the doping element is different from the Group IV element in the Group IV element boride, and the doping element is not boron. A method of fabricating a thermoelectric material including the steps of: providing a Group IV element boride, and doping the Group IV element boride with a doping element chosen from one of the column III, IV, or V elements, wherein the doping element is different from the Group IV element in the Group IV element boride, and the doping element is not boron. An alternate method of fabricating a thermoelectric material is also disclosed including the steps of simultaneously growing on a substrate a Group IV element boride and at least one doping element chosen from one of the Group III, IV, or V elements wherein the doping element is different than the Group IV element in the Group IV element boride and the doping element is not boron.

Abstract translation: 掺杂有III族，IV族或V族元素之一的IV族元素硼化物的热电材料，其中掺杂元素不同于IV族元素硼化物中的IV族元素，掺杂元素不是硼。 一种制造热电材料的方法，包括以下步骤：提供IV族元素硼化物，并用选自第III，IV或V族元素之一的掺杂元素掺杂IV族元素硼化物，其中掺杂元素是不同的 来自IV族元素硼化物中的IV族元素，并且掺杂元素不是硼。 还公开了制造热电材料的替代方法，其包括以下步骤：在衬底上同时生长第IV族元素硼化物和选自III族，IV族或V族元素之一的至少一种掺杂元素，其中掺杂元素不同 比IV族元素硼化物中的IV族元素和掺杂元素不是硼。

公开(公告)号：US20010023660A1

公开(公告)日：2001-09-27

申请号：US09871958

申请日：2001-06-04

Applicant: MOTOROLA, INC.

Inventor： Zhiyi Yu ,  Ravindranath Droopad ,  Corey Daniel Overgaard ,  Jamal Ramdani ,  Jay A. Curless ,  Jerald A. Hallmark ,  William J. Ooms ,  Jun Wang

IPC: C30B025/00 ,  C30B023/00 ,  C30B028/12 ,  C30B028/14

CPC classification number: C30B23/02 ,  C30B25/02 ,  C30B29/16 ,  C30B29/30

Abstract: A method for fabricating a semiconductor structure comprises the steps of providing a silicon substrate (10) having a surface (12); forming on the surface of the silicon substrate an interface (14) comprising a single atomic layer of silicon, oxygen, and a metal; and forming one or more layers of a single crystal oxide (26) on the interface. The interface comprises an atomic layer of silicon, oxygen, and a metal in the form XSiO2, where X is a metal.