中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

4 records (took 0.011 seconds)

    Method and apparatus utilizing monocrystalline insulator
    1.
    发明申请
    Method and apparatus utilizing monocrystalline insulator 有权
    使用单晶绝缘子的方法和装置

    公开(公告)号：US20040217444A1

    公开(公告)日：2004-11-04

    申请号：US10861467

    申请日：2004-06-07

    Applicant: MOTOROLA, INC.

    Inventor： William J. Ooms ,  Jerald A. Hallmark

    IPC: H01L029/00

    CPC classification number: H01L28/55 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/31691 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/94

    Abstract: A semiconductor apparatus includes a capacitor having a substrate, a conductive element and an insulator. The insulator comprises a substantially monocrystalline material having a relatively high dielectric constant. The semiconductor apparatus may further include a supplemental layer having a depletion zone, suitably comprised of a high-resistivity semiconductor material, for forming a voltage-variable capacitor. To facilitate the growth of the insulator and/or other layers, the various layers are suitably lattice matched. Further, the apparatus may include one or more interface layers to facilitate lattice-matching of the various layers.

    Pyroelectric device on a monocrystalline semiconductor substrate and process for fabricating same
    2.
    发明申请
    Pyroelectric device on a monocrystalline semiconductor substrate and process for fabricating same 失效
    单晶半导体衬底上的热电器件及其制造方法

    公开(公告)号：US20020072245A1

    公开(公告)日：2002-06-13

    申请号：US09733181

    申请日：2000-12-08

    Applicant: Motorola, Inc.

    Inventor： William J. Ooms ,  Jeffrey M. Finder ,  Kurt W. Eisenbeiser ,  Jerald A. Hallmark

    IPC: H01L021/31

    CPC classification number: H01L37/02 ,  C30B23/02 ,  C30B25/02 ,  C30B25/18 ,  C30B29/32 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/02521 ,  H01L27/16

    Abstract: High quality epitaxial layers of monocrystalline materials can be grown overlying large silicon wafers by first growing an accommodating buffer layer (104) on a silicon wafer (102). The accommodating buffer layer (104) is a layer of monocrystalline material spaced apart from the silicon wafer (102) by an amorphous interface layer (108) of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline accommodating buffer layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. Utilizing this technique permits the fabrication of thin film pyroelectric devices (150) on a monocrystalline silicon substrate.

    Abstract translation: 通过首先在硅晶片（102）上生长容纳缓冲层（104），可以将高质量的单晶材料外延层生长在大的硅晶片上。 容纳缓冲层（104）是通过氧化硅的非晶界面层（108）与硅晶片（102）间隔开的单晶材料层。 非晶界面层消耗应变并允许高质量单晶容纳缓冲层的生长。 通过非晶界面层处理容纳缓冲层和底层硅衬底之间的任何晶格失配。 利用这种技术允许在单晶硅衬底上制造薄膜热释电器件（150）。

Patent Agency Ranking