公开(公告)号：US20170332483A1

公开(公告)日：2017-11-16

申请号：US15586312

申请日：2017-05-04

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Yasuo FUJII ,  Hiroaki HORI

IPC: H05K1/02 ,  H01G4/248 ,  H05K1/11 ,  H03H7/38 ,  H05K3/30 ,  H01G4/012 ,  H05K1/18 ,  H01G4/30

CPC classification number: H05K1/0231 ,  H01G2/06 ,  H01G4/012 ,  H01G4/232 ,  H01G4/248 ,  H01G4/30 ,  H01G4/35 ,  H01G4/40 ,  H03H7/38 ,  H05K1/0262 ,  H05K1/115 ,  H05K1/181 ,  H05K3/303 ,  H05K2201/10015 ,  H05K2201/10522 ,  H05K2201/10545 ,  H05K2201/10734 ,  Y02P70/611

Abstract: A wiring board is provided with power supply patterns for each type of power supply of an IC. An IC has a plurality of power supply terminals for each type of power supply. For each type of power supply, two or more laminated capacitors are provided in parallel between the power supply of IC and a ground. Two or more laminated capacitors provided for each type of power supply include a laminated capacitor having a Q factor of less than about 0.5. For each type of power supply, in order to satisfy a target impedance, two or more laminated capacitors are arranged and distributed such that at least half of the plurality of power supply terminals are included in a region obtained by combining cover areas.