公开(公告)号：US11936350B2

公开(公告)日：2024-03-19

申请号：US17374065

申请日：2021-07-13

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Makoto Itou ,  Satoshi Arayashiki ,  Satoshi Goto

IPC: H03F3/24 ,  H03F1/02

CPC classification number: H03F3/245 ,  H03F1/0211 ,  H03F2200/222 ,  H03F2200/451

Abstract: A power amplifier circuit includes a first transistor having a first terminal to which a first signal inputs, a second transistor having a first terminal to which the first signal inputs, a first resistor having a first end to which a first bias current is supplied and a second end electrically connected to the first terminal of the first transistor, a second resistor having a first end to which a second bias current is supplied and a second end electrically connected to the first terminal of the second transistor, and a third resistor having a first end connected to the first end of the first resistor and a second end connected to the first end of the second resistor.

公开(公告)号：US11616479B2

公开(公告)日：2023-03-28

申请号：US16839226

申请日：2020-04-03

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Toshikazu Terashima ,  Fumio Harima ,  Makoto Itou ,  Satoshi Tanaka ,  Kazuo Watanabe ,  Satoshi Arayashiki ,  Chikara Yoshida

IPC: H03F3/213 ,  H01L29/417 ,  H01L27/06 ,  H01L29/737 ,  H01L29/423 ,  H01L23/48

Abstract: A power amplifier apparatus includes a semiconductor substrate, a plurality of first transistors on the semiconductor substrate, a plurality of second transistors, at least one collector terminal electrically connected to collectors of the plurality of first transistors, a first inductor having a first end electrically connected to the collector terminal and a second end electrically connected to a power supply potential, at least one emitter terminal electrically connected to emitters of the plurality of second transistors and adjacent to the collector terminal in a second direction, a second inductor having a first end electrically connected to the emitter terminal and a second end electrically connected to a reference potential, and at least one capacitor having a first end electrically connected to the collectors of the plurality of first transistors and a second end electrically connected to the emitters of the plurality of second transistors.

公开(公告)号：US11469715B2

公开(公告)日：2022-10-11

申请号：US17109389

申请日：2020-12-02

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Jun Enomoto ,  Kazuo Watanabe ,  Satoshi Tanaka ,  Yusuke Tanaka ,  Makoto Itou

IPC: H03F1/22 ,  H03F1/32 ,  H03F3/21

Abstract: A power amplifier circuit includes first and second bias circuits configured to provide first and second biases, respectively, a first transistor having an emitter connected to a reference potential, a base configured to receive the first bias via a first resistor and receive a radio-frequency input signal via a first capacitor, and a collector configured to output an amplified radio-frequency signal, a second transistor having a base connected to the reference potential via a second capacitor and configured to receive the second bias via a second resistor, an emitter configured to receive the radio-frequency signal, and a collector connected to a power supply potential via a third inductor and configured to output a radio-frequency output signal, and an impedance circuit having a first end connected to an output section of the second bias circuit and configured to apply an alternating-current signal to a path extending from the second bias circuit.

公开(公告)号：US11245365B2

公开(公告)日：2022-02-08

申请号：US16828630

申请日：2020-03-24

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Toshikazu Terashima ,  Satoshi Tanaka ,  Kazuo Watanabe ,  Makoto Itou ,  Jun Enomoto

IPC: H03F1/30 ,  H03F1/56 ,  H03F1/02 ,  H03F3/213 ,  H03F3/19

Abstract: A power amplifier circuit includes a first transistor, a capacitor, and a second transistor. The first transistor has an emitter electrically connected to a reference potential, a base, and a collector electrically connected to a first power supply potential. A first end of the capacitor is electrically connected to the collector of the first transistor. The second transistor has an emitter electrically connected to a second end of the capacitor and electrically connected to the reference potential, a base, and a collector electrically connected to the first power supply potential. An RF output signal obtained by amplifying the RF input signal is output from the collector of the second transistor. A second bias circuit includes a third transistor having a collector electrically connected to a second power supply potential, a base, and an emitter from which the second bias current or voltage is output.

公开(公告)号：US11387796B2

公开(公告)日：2022-07-12

申请号：US16709262

申请日：2019-12-10

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Satoshi Tanaka ,  Kazuo Watanabe ,  Norio Hayashi ,  Makoto Itou

IPC: H03F3/24 ,  H03F3/19 ,  H03F1/30 ,  H03F1/02

Abstract: A power amplifier circuit includes a lower-stage transistor having a first power supply voltage supplied to a first terminal, a second terminal connected to ground, and a first signal supplied to a third terminal; an upper-stage transistor having a second power supply voltage supplied to a first terminal, a second signal obtained by amplifying the first signal being output from the first terminal, a second terminal connected to the first terminal of the lower-stage transistor via a first capacitor, and a third terminal connected to ground via a ground path; an inductor that connects the second terminal of the upper-stage transistor to ground; and an adjustment circuit that adjusts impedance seen from the third terminal of the upper-stage transistor. The adjustment circuit includes a second capacitor and at least one resistance element connected in series with the ground path between the third terminal of the upper-stage transistor and ground.