公开(公告)号：US4117546A

公开(公告)日：1978-09-26

申请号：US865806

申请日：1977-12-30

申请人： Narasipur Gundappa Anantha ,  Moises Cases ,  Fung Yuel Chang ,  Barry Jay Rubin

发明人： Narasipur Gundappa Anantha ,  Moises Cases ,  Fung Yuel Chang ,  Barry Jay Rubin

IPC分类号： G11C11/56 ,  G11C19/28 ,  G11C27/04 ,  H01L27/10 ,  H01L27/105 ,  H03H11/26 ,  G11C11/40

CPC分类号： H01L27/1057 ,  G11C19/287

摘要： Disclosed is an interlaced serial-parallel-serial (SPS) charge coupled device (CCD) memory with improved clocking. By performing the interlacing as well as the serial-parallel-serial function with only seven clock pulses, less metallurgy and consequently less space per bit on a semiconductor chip is required. By reducing the number of clock requirements, the supporting logic circuitry is simplified permitting a larger portion of the semiconductor chip area to be used for data bit storage.

公开(公告)号：US4120035A

公开(公告)日：1978-10-10

申请号：US825123

申请日：1977-08-16

申请人： Moises Cases ,  Fung Yuel Chang ,  Barry Jay Rubin

发明人： Moises Cases ,  Fung Yuel Chang ,  Barry Jay Rubin

IPC分类号： G06G7/16 ,  G11C27/04 ,  H01L21/339 ,  H01L29/76 ,  H01L29/762 ,  H03H15/02 ,  H03K5/159

CPC分类号： G11C27/04 ,  G06G7/16 ,  H01L29/76 ,  H03H15/02 ,  H03H2015/026

摘要： A charge coupled device analog multiplier is used to weigh the sampled and delayed signals for a transversal filter. The digital filter coefficients for the analog multiplier can be electrically programmed and therefore dynamic time-varying systems, such as matched filters, can be designed with reduced circuit complexity. The digital filter includes means for sampling without destroying an analog signal at various points and providing voltages proportional to each sampled signal. The voltages are separately applied to a charge coupled device analog multiplier which accepts the voltages and provides means for multiplying the digital filter coefficient by the analog voltage. The multiplied sample signal is then dumped into a means for summing all of the weighted sample signals to produce an analog signal modified by the digital filter coefficients.

摘要翻译： 电荷耦合器件模拟乘法器用于对横向滤波器的采样和延迟信号进行称重。 模拟乘法器的数字滤波器系数可以进行电气编程，因此可以设计具有降低的电路复杂度的动态时变系统，例如匹配滤波器。 数字滤波器包括用于采样的装置，而不破坏各个点处的模拟信号并提供与每个采样信号成比例的电压。 电压分别施加到接收电压的电荷耦合器件模拟乘法器，并提供将数字滤波器系数乘以模拟电压的装置。 然后将相乘的采样信号转储成用于对所有加权采样信号求和的装置，以产生由数字滤波器系数修改的模拟信号。