公开(公告)号：US20070082441A1

公开(公告)日：2007-04-12

申请号：US11551992

申请日：2006-10-23

申请人： Nathan Kraft ,  Ashok Challa ,  Steven Sapp ,  Hamza Yilmaz ,  Daniel Calafut ,  Dean Probst ,  Rodney Ridley ,  Thomas Grebs ,  Christopher Kocon ,  Joseph Yedinak ,  Gary Dolny

发明人： Nathan Kraft ,  Ashok Challa ,  Steven Sapp ,  Hamza Yilmaz ,  Daniel Calafut ,  Dean Probst ,  Rodney Ridley ,  Thomas Grebs ,  Christopher Kocon ,  Joseph Yedinak ,  Gary Dolny

IPC分类号： H01L21/8242

CPC分类号： H01L29/7813 ,  H01L21/26586 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/42368 ,  H01L29/66734 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/00

摘要： A field effect transistor is formed as follows. Trenches are formed in a semiconductor region of a first conductivity type. Each trench is partially filled with one or more materials. A dual-pass angled implant is carried out to implant dopants of a second conductivity type into the semiconductor region through an upper surface of the semiconductor region and through upper trench sidewalls not covered by the one or more material. A high temperature process is carried out to drive the implanted dopants deeper into the mesa region thereby forming body regions of the second conductivity type between adjacent trenches. Source regions of the first conductivity type are then formed in each body region.

摘要翻译： 场效应晶体管如下形成。 沟槽形成在第一导电类型的半导体区域中。 每个沟槽部分地填充有一种或多种材料。 执行双通角度注入以通过半导体区域的上表面和不被一种或多种材料覆盖的上沟槽侧壁将第二导电类型的掺杂剂注入半导体区域。 进行高温处理以将注入的掺杂剂更深地驱动到台面区域中，从而在相邻的沟槽之间形成第二导电类型的体区。 然后在每个身体区域中形成第一导电类型的源区域。

公开(公告)号：US20060273386A1

公开(公告)日：2006-12-07

申请号：US11441386

申请日：2006-05-24

申请人： Hamza Yilmaz ,  Daniel Calafut ,  Christopher Kocon ,  Steven Sapp ,  Dean Probst ,  Nathan Kraft ,  Thomas Grebs ,  Rodney Ridley ,  Gary Dolny ,  Bruce Marchant ,  Joseph Yedinak

发明人： Hamza Yilmaz ,  Daniel Calafut ,  Christopher Kocon ,  Steven Sapp ,  Dean Probst ,  Nathan Kraft ,  Thomas Grebs ,  Rodney Ridley ,  Gary Dolny ,  Bruce Marchant ,  Joseph Yedinak

IPC分类号： H01L29/94

CPC分类号： H01L29/7827 ,  H01L21/26586 ,  H01L29/0878 ,  H01L29/402 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66666 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/872

摘要： A field effect transistor includes a body region of a first conductivity type over a semiconductor region of a second conductivity type. A gate trench extends through the body region and terminates within the semiconductor region. At least one conductive shield electrode is disposed in the gate trench. A gate electrode is disposed in the gate trench over but insulated from the at least one conductive shield electrode. A shield dielectric layer insulates the at lease one conductive shield electrode from the semiconductor region. A gate dielectric layer insulates the gate electrode from the body region. The shield dielectric layer is formed such that it flares out and extends directly under the body region.

摘要翻译： 场效应晶体管包括在第二导电类型的半导体区域上的第一导电类型的体区。 栅极沟槽延伸穿过身体区域并终止在半导体区域内。 至少一个导电屏蔽电极设置在栅极沟槽中。 栅极电极设置在栅极沟槽中，但与至少一个导电屏蔽电极绝缘。 屏蔽介电层绝缘至少一个导电屏蔽电极与半导体区域。 栅极电介质层使栅电极与体区绝缘。 屏蔽电介质层形成为使其伸出并直接延伸到身体区域下方。

公开(公告)号：US07393749B2

公开(公告)日：2008-07-01

申请号：US11450903

申请日：2006-06-08

申请人： Hamza Yilmaz ,  Daniel Calafut ,  Steven Sapp ,  Nathan Kraft ,  Ashok Challa

发明人： Hamza Yilmaz ,  Daniel Calafut ,  Steven Sapp ,  Nathan Kraft ,  Ashok Challa

IPC分类号： H01L21/336 ,  H01L23/62

CPC分类号： H01L29/7813 ,  H01L21/26513 ,  H01L21/26586 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/66666 ,  H01L29/66712 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7827 ,  H01L2924/0002 ,  H01L2924/00

摘要： A field effect transistor is formed as follows. A semiconductor region of a first conductivity type with an epitaxial layer of a second conductivity extending over the semiconductor region is provided. A trench extending through the epitaxial layer and terminating in the semiconductor region is formed. A two-pass angled implant of dopants of the first conductivity type is carried out to thereby form a region of first conductivity type along the trench sidewalls. A threshold voltage adjust implant of dopants of the second conductivity type is carried out to thereby convert a conductivity type of a portion of the region of first conductivity type extending along upper sidewalls of the trench to the second conductivity type. Source regions of the first conductivity type flanking each side of the trench are formed.

摘要翻译： 场效应晶体管如下形成。 提供了具有在半导体区域上延伸的具有第二导电性的外延层的第一导电类型的半导体区域。 形成延伸穿过外延层并终止在半导体区域中的沟槽。 执行第一导电类型的掺杂剂的双向成角度注入，从而沿着沟槽侧壁形成第一导电类型的区域。 执行阈值电压调整第二导电类型的掺杂剂的注入，从而将沿沟槽的上侧壁延伸的第一导电类型区域的一部分的导电类型转换为第二导电类型。 形成沟槽每一侧的第一导电类型的源区。

公开(公告)号：US07767524B2

公开(公告)日：2010-08-03

申请号：US12582487

申请日：2009-10-20

申请人： Hamza Yilmaz ,  Daniel Calafut ,  Steven Sapp ,  Nathan Kraft ,  Ashok Challa

发明人： Hamza Yilmaz ,  Daniel Calafut ,  Steven Sapp ,  Nathan Kraft ,  Ashok Challa

IPC分类号： H01L21/336 ,  H01L23/62

CPC分类号： H01L29/7813 ,  H01L21/26513 ,  H01L21/26586 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/66666 ,  H01L29/66712 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7827 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of forming a charge balance MOSFET includes the following steps. A substrate with an overlying epitaxial layer both of a first conductivity type, are provided. A gate trench extending through the epitaxial layer and terminating within the substrate is formed. A shield dielectric lining sidewalls and bottom surface of the gate trench is formed. A shield electrode is formed in the gate trench. A gate dielectric layer is formed along upper sidewalls of the gate trench. A gate electrode is formed in the gate trench such that the gate electrode extends over but is insulated from the shield electrode. A deep dimple extending through the epitaxial layer and terminating within the substrate is formed such that the deep dimple is laterally spaced from the gate trench. The deep dimple is filled with silicon material of the second conductivity type.

摘要翻译： 形成电荷平衡MOSFET的方法包括以下步骤。 提供了具有第一导电类型的上覆外延层的衬底。 形成延伸穿过外延层并终止在衬底内的栅极沟槽。 形成栅极沟槽的侧壁和底表面的屏蔽电介质。 在栅极沟槽中形成屏蔽电极。 栅极电介质层沿栅极沟槽的上侧壁形成。 栅电极形成在栅极沟槽中，使得栅电极延伸过去但与屏蔽电极绝缘。 形成延伸穿过外延层并终止于衬底内的深凹坑，使得深凹坑与栅沟槽横向间隔开。 深凹坑填充有第二导电类型的硅材料。

公开(公告)号：US20110303975A1

公开(公告)日：2011-12-15

申请号：US13152041

申请日：2011-06-02

申请人： Hamza Yilmaz ,  Daniel Calafut ,  Steven Sapp ,  Nathan Kraft ,  Ashok Challa

发明人： Hamza Yilmaz ,  Daniel Calafut ,  Steven Sapp ,  Nathan Kraft ,  Ashok Challa

IPC分类号： H01L29/78

CPC分类号： H01L29/7813 ,  H01L21/26513 ,  H01L21/26586 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/66666 ,  H01L29/66712 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7827 ,  H01L2924/0002 ,  H01L2924/00

摘要： A field effect transistor includes a plurality of trenches extending into a semiconductor region of a first conductivity type. The plurality of trenches includes a plurality of gated trenches and a plurality of non-gated trenches. A body region of a second conductivity extends in the semiconductor region between adjacent trenches. A dielectric material fills a bottom portion of each of the gated and non-gated trenches. A gate electrode is disposed in each gated trench. A conductive material of the second conductivity type is disposed in each non-gated trench such that the conductive material and contacts corresponding body regions along sidewalls of the non-gated trench.

摘要翻译： 场效应晶体管包括延伸到第一导电类型的半导体区域的多个沟槽。 多个沟槽包括多个门控沟槽和多个非门控沟槽。 第二导电体的主体区域在相邻沟槽之间的半导体区域中延伸。 电介质材料填充每个门控沟槽和非门控沟槽的底部。 栅极电极设置在每个门控沟槽中。 第二导电类型的导电材料设置在每个非门控沟槽中，使得导电材料并且沿着非门控沟槽的侧壁接触对应的主体区域。

公开(公告)号：US20060281249A1

公开(公告)日：2006-12-14

申请号：US11450903

申请日：2006-06-08

申请人： Hamza Yilmaz ,  Daniel Calafut ,  Steven Sapp ,  Nathan Kraft ,  Ashok Challa

发明人： Hamza Yilmaz ,  Daniel Calafut ,  Steven Sapp ,  Nathan Kraft ,  Ashok Challa

IPC分类号： H01L21/8242

CPC分类号： H01L29/7813 ,  H01L21/26513 ,  H01L21/26586 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/66666 ,  H01L29/66712 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7827 ,  H01L2924/0002 ,  H01L2924/00

摘要： A field effect transistor is formed as follows. A semiconductor region of a first conductivity type with an epitaxial layer of a second conductivity extending over the semiconductor region is provided. A trench extending through the epitaxial layer and terminating in the semiconductor region is formed. A two-pass angled implant of dopants of the first conductivity type is carried out to thereby form a region of first conductivity type along the trench sidewalls. A threshold voltage adjust implant of dopants of the second conductivity type is carried out to thereby convert a conductivity type of a portion of the region of first conductivity type extending along upper sidewalls of the trench to the second conductivity type. Source regions of the first conductivity type flanking each side of the trench are formed.

摘要翻译： 场效应晶体管如下形成。 提供了具有延伸在半导体区域上的具有第二导电性的外延层的第一导电类型的半导体区域。 形成延伸穿过外延层并终止在半导体区域中的沟槽。 执行第一导电类型的掺杂剂的双向成角度注入，从而沿着沟槽侧壁形成第一导电类型的区域。 执行阈值电压调整第二导电类型的掺杂剂的注入，从而将沿沟槽的上侧壁延伸的第一导电类型区域的一部分的导电类型转换为第二导电类型。 形成沟槽每一侧的第一导电类型的源区。

公开(公告)号：US20100258855A1

公开(公告)日：2010-10-14

申请号：US12822008

申请日：2010-06-23

申请人： Hamza Yilmaz ,  Daniel Calafut ,  Steven Sapp ,  Nathan Kraft ,  Ashok Challa

发明人： Hamza Yilmaz ,  Daniel Calafut ,  Steven Sapp ,  Nathan Kraft ,  Ashok Challa

IPC分类号： H01L27/088 ,  H01L21/336 ,  H01L29/78

CPC分类号： H01L29/7813 ,  H01L21/26513 ,  H01L21/26586 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/66666 ,  H01L29/66712 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7827 ,  H01L2924/0002 ,  H01L2924/00

摘要： A field effect transistor includes a plurality of trenches extending into a semiconductor region of a first conductivity type. The plurality of trenches include a plurality of gated trenches and a plurality of non-gated trenches. A body region of a second conductivity extends in the semiconductor region between adjacent trenches. A dielectric material fills a bottom portion of each of the gated and non-gated trenches. A gate electrode is disposed in each gated trench. A conductive material of the second conductivity type is disposed in each non-gated trench such that the conductive material and contacts corresponding body regions along sidewalls of the non-gated trench.

摘要翻译： 场效应晶体管包括延伸到第一导电类型的半导体区域的多个沟槽。 多个沟槽包括多个门控沟槽和多个非门控沟槽。 第二导电体的主体区域在相邻沟槽之间的半导体区域中延伸。 电介质材料填充每个门控沟槽和非门控沟槽的底部。 栅极电极设置在每个门控沟槽中。 第二导电类型的导电材料设置在每个非门控沟槽中，使得导电材料并且沿着非门控沟槽的侧壁接触对应的主体区域。

公开(公告)号：US20100038708A1

公开(公告)日：2010-02-18

申请号：US12582487

申请日：2009-10-20

申请人： Hamza Yilmaz ,  Daniel Calafut ,  Steven Sapp ,  Nathan Kraft ,  Ashok Challa

发明人： Hamza Yilmaz ,  Daniel Calafut ,  Steven Sapp ,  Nathan Kraft ,  Ashok Challa

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/7813 ,  H01L21/26513 ,  H01L21/26586 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/66666 ,  H01L29/66712 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7827 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of forming a charge balance MOSFET includes the following steps. A substrate with an overlying epitaxial layer both of a first conductivity type, are provided. A gate trench extending through the epitaxial layer and terminating within the substrate is formed. A shield dielectric lining sidewalls and bottom surface of the gate trench is formed. A shield electrode is formed in the gate trench. A gate dielectric layer is formed along upper sidewalls of the gate trench. A gate electrode is formed in the gate trench such that the gate electrode extends over but is insulated from the shield electrode. A deep dimple extending through the epitaxial layer and terminating within the substrate is formed such that the deep dimple is laterally spaced from the gate trench. The deep dimple is filled with silicon material of the second conductivity type.

摘要翻译： 形成电荷平衡MOSFET的方法包括以下步骤。 提供了具有第一导电类型的上覆外延层的衬底。 形成延伸穿过外延层并终止在衬底内的栅极沟槽。 形成栅极沟槽的侧壁和底表面的屏蔽电介质。 在栅极沟槽中形成屏蔽电极。 栅极电介质层沿栅极沟槽的上侧壁形成。 栅电极形成在栅极沟槽中，使得栅电极延伸过去但与屏蔽电极绝缘。 形成延伸穿过外延层并终止于衬底内的深凹坑，使得深凹坑与栅沟槽横向间隔开。 深凹坑填充有第二导电类型的硅材料。

公开(公告)号：US07625799B2

公开(公告)日：2009-12-01

申请号：US12418949

申请日：2009-04-06

申请人： Hamza Yilmaz ,  Daniel Calafut ,  Steven Sapp ,  Nathan Kraft ,  Ashok Challa

发明人： Hamza Yilmaz ,  Daniel Calafut ,  Steven Sapp ,  Nathan Kraft ,  Ashok Challa

IPC分类号： H01L21/336 ,  H01L23/62

CPC分类号： H01L29/7813 ,  H01L21/26513 ,  H01L21/26586 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/66666 ,  H01L29/66712 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7827 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor region with an epitaxial layer extending over the semiconductor region is provided. A first silicon etch is performed to form an upper trench portion extending into and terminating within the epitaxial layer. A protective material is formed extending along sidewalls of the upper trench portion and over mesa regions adjacent the upper trench portion but not along a bottom surface of the upper trench portion. A second silicon etch is performed to form a lower trench portion extending from the bottom surface of the upper trench portion through the epitaxial layer and terminating within the semiconductor region, such that the lower trench portion is narrower than the upper trench portion. A two-pass angled implant of dopants of the first conductivity type is carried out to form a silicon region of first conductivity type along sidewalls of the lower trench portion, while the protective material blocks the implant dopants from entering the sidewalls of the upper trench portion and the mesa region adjacent the upper trench portion.

摘要翻译： 提供了具有在半导体区域上延伸的外延层的半导体区域。 执行第一硅蚀刻以形成延伸到外延层内并在外延层内终止的上沟槽部分。 沿着上沟槽部分的侧壁以及与上沟槽部分相邻的台面区域，而不是沿着上沟槽部分的底表面延伸形成保护材料。 执行第二硅蚀刻以形成从上沟槽部分的底表面延伸穿过外延层并终止在半导体区域内的下沟槽部分，使得下沟槽部分比上沟槽部分窄。 执行第一导电类型的掺杂剂的双向成角度注入，以形成沿着下沟槽部分的侧壁的第一导电类型的硅区域，而保护材料阻挡注入掺杂剂进入上沟槽部分的侧壁 以及与上沟槽部分相邻的台面区域。

公开(公告)号：US20090191678A1

公开(公告)日：2009-07-30

申请号：US12418949

申请日：2009-04-06

申请人： Hamza Yilmaz ,  Daniel Calafut ,  Steven Sapp ,  Nathan Kraft ,  Ashok Challa

发明人： Hamza Yilmaz ,  Daniel Calafut ,  Steven Sapp ,  Nathan Kraft ,  Ashok Challa

IPC分类号： H01L21/334

CPC分类号： H01L29/7813 ,  H01L21/26513 ,  H01L21/26586 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/66666 ,  H01L29/66712 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7827 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor region with an epitaxial layer extending over the semiconductor region is provided. A first silicon etch is performed to form an upper trench portion extending into and terminating within the epitaxial layer. A protective material is formed extending along sidewalls of the upper trench portion and over mesa regions adjacent the upper trench portion but not along a bottom surface of the upper trench portion. A second silicon etch is performed to form a lower trench portion extending from the bottom surface of the upper trench portion through the epitaxial layer and terminating within the semiconductor region, such that the lower trench portion is narrower than the upper trench portion. A two-pass angled implant of dopants of the first conductivity type is carried out to form a silicon region of first conductivity type along sidewalls of the lower trench portion, while the protective material blocks the implant dopants from entering the sidewalls of the upper trench portion and the mesa region adjacent the upper trench portion.

摘要翻译： 提供了具有在半导体区域上延伸的外延层的半导体区域。 执行第一硅蚀刻以形成延伸到外延层内并在外延层内终止的上沟槽部分。 沿着上沟槽部分的侧壁以及与上沟槽部分相邻的台面区域，而不是沿着上沟槽部分的底表面延伸形成保护材料。 执行第二硅蚀刻以形成从上沟槽部分的底表面延伸穿过外延层并终止在半导体区域内的下沟槽部分，使得下沟槽部分比上沟槽部分窄。 执行第一导电类型的掺杂剂的双向成角度注入以在下沟槽部分的侧壁形成第一导电类型的硅区域，而保护材料阻挡注入掺杂剂进入上沟槽部分的侧壁 以及与上沟槽部分相邻的台面区域。