公开(公告)号：US20070082441A1

公开(公告)日：2007-04-12

申请号：US11551992

申请日：2006-10-23

申请人： Nathan Kraft ,  Ashok Challa ,  Steven Sapp ,  Hamza Yilmaz ,  Daniel Calafut ,  Dean Probst ,  Rodney Ridley ,  Thomas Grebs ,  Christopher Kocon ,  Joseph Yedinak ,  Gary Dolny

发明人： Nathan Kraft ,  Ashok Challa ,  Steven Sapp ,  Hamza Yilmaz ,  Daniel Calafut ,  Dean Probst ,  Rodney Ridley ,  Thomas Grebs ,  Christopher Kocon ,  Joseph Yedinak ,  Gary Dolny

IPC分类号： H01L21/8242

CPC分类号： H01L29/7813 ,  H01L21/26586 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/42368 ,  H01L29/66734 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/00

摘要： A field effect transistor is formed as follows. Trenches are formed in a semiconductor region of a first conductivity type. Each trench is partially filled with one or more materials. A dual-pass angled implant is carried out to implant dopants of a second conductivity type into the semiconductor region through an upper surface of the semiconductor region and through upper trench sidewalls not covered by the one or more material. A high temperature process is carried out to drive the implanted dopants deeper into the mesa region thereby forming body regions of the second conductivity type between adjacent trenches. Source regions of the first conductivity type are then formed in each body region.

摘要翻译： 场效应晶体管如下形成。 沟槽形成在第一导电类型的半导体区域中。 每个沟槽部分地填充有一种或多种材料。 执行双通角度注入以通过半导体区域的上表面和不被一种或多种材料覆盖的上沟槽侧壁将第二导电类型的掺杂剂注入半导体区域。 进行高温处理以将注入的掺杂剂更深地驱动到台面区域中，从而在相邻的沟槽之间形成第二导电类型的体区。 然后在每个身体区域中形成第一导电类型的源区域。

公开(公告)号：US20060273386A1

公开(公告)日：2006-12-07

申请号：US11441386

申请日：2006-05-24

申请人： Hamza Yilmaz ,  Daniel Calafut ,  Christopher Kocon ,  Steven Sapp ,  Dean Probst ,  Nathan Kraft ,  Thomas Grebs ,  Rodney Ridley ,  Gary Dolny ,  Bruce Marchant ,  Joseph Yedinak

发明人： Hamza Yilmaz ,  Daniel Calafut ,  Christopher Kocon ,  Steven Sapp ,  Dean Probst ,  Nathan Kraft ,  Thomas Grebs ,  Rodney Ridley ,  Gary Dolny ,  Bruce Marchant ,  Joseph Yedinak

IPC分类号： H01L29/94

CPC分类号： H01L29/7827 ,  H01L21/26586 ,  H01L29/0878 ,  H01L29/402 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66666 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/872

摘要： A field effect transistor includes a body region of a first conductivity type over a semiconductor region of a second conductivity type. A gate trench extends through the body region and terminates within the semiconductor region. At least one conductive shield electrode is disposed in the gate trench. A gate electrode is disposed in the gate trench over but insulated from the at least one conductive shield electrode. A shield dielectric layer insulates the at lease one conductive shield electrode from the semiconductor region. A gate dielectric layer insulates the gate electrode from the body region. The shield dielectric layer is formed such that it flares out and extends directly under the body region.

摘要翻译： 场效应晶体管包括在第二导电类型的半导体区域上的第一导电类型的体区。 栅极沟槽延伸穿过身体区域并终止在半导体区域内。 至少一个导电屏蔽电极设置在栅极沟槽中。 栅极电极设置在栅极沟槽中，但与至少一个导电屏蔽电极绝缘。 屏蔽介电层绝缘至少一个导电屏蔽电极与半导体区域。 栅极电介质层使栅电极与体区绝缘。 屏蔽电介质层形成为使其伸出并直接延伸到身体区域下方。

公开(公告)号：US20050167742A1

公开(公告)日：2005-08-04

申请号：US11026276

申请日：2004-12-29

申请人： Ashok Challa ,  Alan Elbanhawy ,  Thomas Grebs ,  Nathan Kraft ,  Dean Probst ,  Rodney Ridley ,  Steven Sapp ,  Qi Wang ,  Chongman Yun ,  J.G. Lee ,  Peter Wilson ,  Joseph Yedinak ,  J.Y. Jung ,  H.C. Jang ,  Babak Sani ,  Richard Stokes ,  Gary Dolny ,  John Mytych ,  Becky Losee ,  Adam Selsley ,  Robert Herrick ,  James Murphy ,  Gordon Madson ,  Bruce Marchant ,  Christopher Rexer ,  Christopher Kocon ,  Debra Woolsey

发明人： Ashok Challa ,  Alan Elbanhawy ,  Thomas Grebs ,  Nathan Kraft ,  Dean Probst ,  Rodney Ridley ,  Steven Sapp ,  Qi Wang ,  Chongman Yun ,  J.G. Lee ,  Peter Wilson ,  Joseph Yedinak ,  J.Y. Jung ,  H.C. Jang ,  Babak Sani ,  Richard Stokes ,  Gary Dolny ,  John Mytych ,  Becky Losee ,  Adam Selsley ,  Robert Herrick ,  James Murphy ,  Gordon Madson ,  Bruce Marchant ,  Christopher Rexer ,  Christopher Kocon ,  Debra Woolsey

IPC分类号： G06F1/26 ,  H01L21/265 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/336 ,  H01L21/68 ,  H01L23/495 ,  H01L23/498 ,  H01L29/06 ,  H01L29/165 ,  H01L29/40 ,  H01L29/417 ,  H01L29/423 ,  H01L29/49 ,  H01L29/78 ,  H02M3/00 ,  H02M3/335

CPC分类号： H01L29/7802 ,  H01L21/26586 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/31116 ,  H01L21/6835 ,  H01L23/4952 ,  H01L23/49816 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/165 ,  H01L29/402 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/4933 ,  H01L29/495 ,  H01L29/66734 ,  H01L29/7804 ,  H01L29/7805 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7815 ,  H01L29/7828 ,  H01L29/7831 ,  H01L2221/6834 ,  H01L2221/68363 ,  H01L2224/16 ,  H01L2224/16245 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/12032 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H02M3/00 ,  H02M3/33592 ,  H02M7/48 ,  Y02B70/1475 ,  H01L2924/00 ,  H01L2924/00014

摘要： Various embodiments for improved power devices as well as their methods of manufacture, packaging and circuitry incorporating the same for use in a wide variety of power electronic applications are disclosed. One aspect of the invention combines a number of charge balancing techniques and other techniques for reducing parasitic capacitance to arrive at different embodiments for power devices with improved voltage performance, higher switching speed, and lower on-resistance. Another aspect of the invention provides improved termination structures for low, medium and high voltage devices. Improved methods of fabrication for power devices are provided according to other aspects of the invention. Improvements to specific processing steps, such as formation of trenches, formation of dielectric layers inside trenches, formation of mesa structures and processes for reducing substrate thickness, among others, are presented. According to another aspect of the invention, charge balanced power devices incorporate temperature and current sensing elements such as diodes on the same die. Other aspects of the invention improve equivalent series resistance (ESR) for power devices, incorporate additional circuitry on the same chip as the power device and provide improvements to the packaging of charge balanced power devices.

摘要翻译： 公开了用于改进的功率器件的各种实施例及其制造方法，封装和结合其的用于各种功率电子应用的电路。 本发明的一个方面结合了许多电荷平衡技术和用于减小寄生电容的其它技术，以获得具有改进的电压性能，较高开关速度和较低导通电阻的功率器件的不同实施例。 本发明的另一方面提供了用于低，中和高电压装置的改进的端接结构。 根据本发明的其它方面提供了改进的功率器件制造方法。 提出了具体的处理步骤的改进，例如沟槽的形成，沟槽内的电介质层的形成，台面结构的形成以及用于降低衬底厚度的工艺等。 根据本发明的另一方面，电荷平衡功率器件在同一管芯上并入温度和电流检测元件，例如二极管。 本发明的其它方面改进了用于功率器件的等效串联电阻（ESR），在与功率器件相同的芯片上并入附加电路，并提供对电荷平衡功率器件的封装的改进。

公开(公告)号：US20060214221A1

公开(公告)日：2006-09-28

申请号：US11445020

申请日：2006-05-31

申请人： Ashok Challa ,  Alan Elbanhawy ,  Thomas Grebs ,  Nathan Kraft ,  Dean Probst ,  Rodney Ridley ,  Steven Sapp ,  Qi Wang ,  Chongman Yun ,  J.G. Lee ,  Peter Wilson ,  Joseph Yedinak ,  J.Y. Jung ,  H.C. Jang ,  Babak Sani ,  Richard Stokes ,  Gary Dolny ,  John Mytych ,  Becky Losee ,  Adam Selsley ,  Robert Herrick ,  James Murphy ,  Gordon Madson ,  Bruce Marchant ,  Christopher Rexer ,  Christopher Kocon ,  Debra Woolsey

发明人： Ashok Challa ,  Alan Elbanhawy ,  Thomas Grebs ,  Nathan Kraft ,  Dean Probst ,  Rodney Ridley ,  Steven Sapp ,  Qi Wang ,  Chongman Yun ,  J.G. Lee ,  Peter Wilson ,  Joseph Yedinak ,  J.Y. Jung ,  H.C. Jang ,  Babak Sani ,  Richard Stokes ,  Gary Dolny ,  John Mytych ,  Becky Losee ,  Adam Selsley ,  Robert Herrick ,  James Murphy ,  Gordon Madson ,  Bruce Marchant ,  Christopher Rexer ,  Christopher Kocon ,  Debra Woolsey

IPC分类号： H01L29/76

CPC分类号： H01L29/407 ,  H01L21/26586 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/31116 ,  H01L21/6835 ,  H01L23/4952 ,  H01L23/49816 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0661 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/165 ,  H01L29/402 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/4933 ,  H01L29/495 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7396 ,  H01L29/7802 ,  H01L29/7804 ,  H01L29/7805 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7815 ,  H01L29/7828 ,  H01L29/7831 ,  H01L2221/6834 ,  H01L2221/68363 ,  H01L2224/16 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/12032 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H02M3/00 ,  H02M3/33592 ,  H02M7/48 ,  Y02B70/1475 ,  H01L2924/00 ,  H01L2924/00014

摘要： Various embodiments for improved power devices as well as their methods of manufacture, packaging and circuitry incorporating the same for use in a wide variety of power electronic applications are disclosed. One aspect of the invention combines a number of charge balancing techniques and other techniques for reducing parasitic capacitance to arrive at different embodiments for power devices with improved voltage performance, higher switching speed, and lower on-resistance. Another aspect of the invention provides improved termination structures for low, medium and high voltage devices. Improved methods of fabrication for power devices are provided according to other aspects of the invention. Improvements to specific processing steps, such as formation of trenches, formation of dielectric layers inside trenches, formation of mesa structures and processes for reducing substrate thickness, among others, are presented. According to another aspect of the invention, charge balanced power devices incorporate temperature and current sensing elements such as diodes on the same die. Other aspects of the invention improve equivalent series resistance (ESR) for power devices, incorporate additional circuitry on the same chip as the power device and provide improvements to the packaging of charge balanced power devices.

公开(公告)号：US20060214222A1

公开(公告)日：2006-09-28

申请号：US11445111

申请日：2006-05-31

申请人： Ashok Challa ,  Alan Elbanhawy ,  Thomas Grebs ,  Nathan Kraft ,  Dean Probst ,  Rodney Ridley ,  Steven Sapp ,  Qi Wang ,  Chongman Yun ,  J. Lee ,  Peter Wilson ,  Joseph Yedinak ,  J. Jung ,  H. Jang ,  Babak Sani ,  Richard Stokes ,  Gary Dolny ,  John Mytych ,  Becky Losee ,  Adam Selsley ,  Robert Herrick ,  James Murphy ,  Gordon Madson ,  Bruce Marchant ,  Christopher Rexer ,  Christopher Kocon ,  Debra Woolsey

发明人： Ashok Challa ,  Alan Elbanhawy ,  Thomas Grebs ,  Nathan Kraft ,  Dean Probst ,  Rodney Ridley ,  Steven Sapp ,  Qi Wang ,  Chongman Yun ,  J. Lee ,  Peter Wilson ,  Joseph Yedinak ,  J. Jung ,  H. Jang ,  Babak Sani ,  Richard Stokes ,  Gary Dolny ,  John Mytych ,  Becky Losee ,  Adam Selsley ,  Robert Herrick ,  James Murphy ,  Gordon Madson ,  Bruce Marchant ,  Christopher Rexer ,  Christopher Kocon ,  Debra Woolsey

IPC分类号： H01L29/76

CPC分类号： H01L29/407 ,  H01L21/26586 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/31116 ,  H01L21/6835 ,  H01L23/4952 ,  H01L23/49816 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/0661 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/165 ,  H01L29/402 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/4933 ,  H01L29/495 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7396 ,  H01L29/7802 ,  H01L29/7804 ,  H01L29/7805 ,  H01L29/7806 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7815 ,  H01L29/7828 ,  H01L29/7831 ,  H01L2221/6834 ,  H01L2221/68363 ,  H01L2224/16 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/12032 ,  H01L2924/1301 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/19041 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H02M3/00 ,  H02M3/33592 ,  H02M7/48 ,  Y02B70/1475 ,  H01L2924/00 ,  H01L2924/00014

摘要： Various embodiments for improved power devices as well as their methods of manufacture, packaging and circuitry incorporating the same for use in a wide variety of power electronic applications are disclosed. One aspect of the invention combines a number of charge balancing techniques and other techniques for reducing parasitic capacitance to arrive at different embodiments for power devices with improved voltage performance, higher switching speed, and lower on-resistance. Another aspect of the invention provides improved termination structures for low, medium and high voltage devices. Improved methods of fabrication for power devices are provided according to other aspects of the invention. Improvements to specific processing steps, such as formation of trenches, formation of dielectric layers inside trenches, formation of mesa structures and processes for reducing substrate thickness, among others, are presented. According to another aspect of the invention, charge balanced power devices incorporate temperature and current sensing elements such as diodes on the same die. Other aspects of the invention improve equivalent series resistance (ESR) for power devices, incorporate additional circuitry on the same chip as the power device and provide improvements to the packaging of charge balanced power devices.

公开(公告)号：US20070032020A1

公开(公告)日：2007-02-08

申请号：US11479117

申请日：2006-06-29

申请人： Thomas Grebs ,  Nathan Kraft ,  Rodney Ridley ,  Gary Dolny ,  Joseph Yedinak ,  Christopher Kocon ,  Ashok Challa

发明人： Thomas Grebs ,  Nathan Kraft ,  Rodney Ridley ,  Gary Dolny ,  Joseph Yedinak ,  Christopher Kocon ,  Ashok Challa

IPC分类号： H01L21/336 ,  H01L21/3205

CPC分类号： H01L29/7813 ,  H01L21/26586 ,  H01L29/0865 ,  H01L29/0869 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/66719 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7811

摘要： A field effect transistor is formed as follows. A trench is formed in a semiconductor region. A dielectric layer lining the trench sidewalls and bottom is formed. The trench is filled with a conductive material. The conductive material is recessed into the trench to thereby form a shield electrode in a bottom portion of the trench. The recessing of the conductive material includes isotropic etching of the conductive material. An inter-electrode dielectric (IED) is formed over the recessed shield electrode.

摘要翻译： 场效应晶体管如下形成。 在半导体区域中形成沟槽。 形成衬在沟槽侧壁和底部的电介质层。 沟槽填充有导电材料。 导电材料凹陷到沟槽中，从而在沟槽的底部形成屏蔽电极。 导电材料的凹陷包括导电材料的各向同性蚀刻。 在凹形屏蔽电极上形成电极间电介质（IED）。

公开(公告)号：US20100207205A1

公开(公告)日：2010-08-19

申请号：US12389335

申请日：2009-02-19

申请人： Thomas E. Grebs ,  Mark Rinehimer ,  Joseph Yedinak ,  Dean E. Probst ,  Gary Dolny ,  John Benjamin

发明人： Thomas E. Grebs ,  Mark Rinehimer ,  Joseph Yedinak ,  Dean E. Probst ,  Gary Dolny ,  John Benjamin

IPC分类号： H01L27/088 ,  G03F1/00 ,  H01L21/8234 ,  H01L21/336

CPC分类号： H01L29/872 ,  H01L23/544 ,  H01L29/0657 ,  H01L29/66143 ,  H01L29/7811 ,  H01L29/8725 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2924/0002 ,  H01L2924/00

摘要： Various structures and methods for improving the performance of trench-shielded power semiconductor devices and the like are described.

摘要翻译： 描述了用于改善沟槽屏蔽功率半导体器件等的性能的各种结构和方法。

公开(公告)号：US08148749B2

公开(公告)日：2012-04-03

申请号：US12389335

申请日：2009-02-19

申请人： Thomas E. Grebs ,  Mark Rinehimer ,  Joseph Yedinak ,  Dean E. Probst ,  Gary Dolny ,  John Benjamin

发明人： Thomas E. Grebs ,  Mark Rinehimer ,  Joseph Yedinak ,  Dean E. Probst ,  Gary Dolny ,  John Benjamin

IPC分类号： H01L29/02 ,  H01L21/332

CPC分类号： H01L29/872 ,  H01L23/544 ,  H01L29/0657 ,  H01L29/66143 ,  H01L29/7811 ,  H01L29/8725 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2924/0002 ,  H01L2924/00

摘要： Various structures and methods for improving the performance of trench-shielded power semiconductor devices and the like are described. An exemplary device comprises a semiconductor region having a surface, a first area of the semiconductor region, a well region of a first conductivity type disposed in the semiconductor region and around the first area, and a plurality of trenches extending in a semiconductor region. Each trench haves a first end disposed in a first portion of the well region, a second end disposed in a second portion of the well region, and a middle portion between the first and second ends and disposed in the first area. Each trench further having opposing sidewalls lined with a dielectric layer, and a conductive electrode disposed on at least a portion of the dielectric layer.

摘要翻译： 描述了用于改善沟槽屏蔽功率半导体器件等的性能的各种结构和方法。 示例性器件包括具有表面的半导体区域，半导体区域的第一区域，设置在半导体区域中并围绕第一区域的第一导电类型的阱区域以及在半导体区域中延伸的多个沟槽。 每个沟槽具有设置在阱区的第一部分中的第一端，设置在阱区的第二部分中的第二端和在第一和第二端之间的中间部分，并且设置在第一区域中。 每个沟槽还具有排列有电介质层的相对侧壁，以及设置在电介质层的至少一部分上的导电电极。

公开(公告)号：US20060258081A1

公开(公告)日：2006-11-16

申请号：US11487015

申请日：2006-07-14

申请人： Christopher Kocon ,  Joseph Yedinak

发明人： Christopher Kocon ,  Joseph Yedinak

IPC分类号： H01L21/8234

CPC分类号： H01L29/7816 ,  H01L29/0653 ,  H01L29/404 ,  H01L29/407 ,  H01L29/7802 ,  H01L29/7813 ,  H01L29/7818 ,  H01L29/861

摘要： A semiconductor structure is formed as follows. A semiconductor region is formed to have a P-type region and a N-type region forming a PN junction therebetween. A first trench is formed extending in the semiconductor region adjacent at least one of the P-type and N-type regions is formed. At least one diode is formed in the trench.

公开(公告)号：US20070210341A1

公开(公告)日：2007-09-13

申请号：US11375683

申请日：2006-03-13

申请人： Chanho Park ,  Joseph Yedinak ,  Christopher Kocon ,  Jason Higgs ,  Jaegil Lee

发明人： Chanho Park ,  Joseph Yedinak ,  Christopher Kocon ,  Jason Higgs ,  Jaegil Lee

IPC分类号： H01L29/76

CPC分类号： H01L29/0634 ,  H01L29/0696 ,  H01L29/7811 ,  H01L2924/0002 ,  H01L2924/00

摘要： A charge balance semiconductor power device comprises an active area having strips of p pillars and strips of n pillars arranged in an alternating manner, the strips of p and n pillars extending along a length of the active area. A non-active perimeter region surrounds the active area, and includes at least one p ring surrounding the active area. One end of at last one of the strips of p pillars extending immediately adjacent an edge of the active area terminates at a substantially straight line at which one end of each of the remainder of the strips of p pillars also end. The straight line extends perpendicular to the length of the active area along which the strips of n and p pillars extend.

摘要翻译： 电荷平衡半导体功率器件包括有源区，其具有p柱的条带和以交替方式布置的n个柱的条带，沿着有源区的长度延伸的p和n柱的条带。 非活动周边区域包围有源区域，并且包括围绕有源区域的至少一个p环。 最后一根直立在有源区域边缘上的p柱条的一端终止于大致直线，其中p柱的每条剩余的条的一端也结束。 直线垂直于有源区域的长度延伸，n和p柱的条带沿着该区域的长度延伸。