-
Patent Agency Ranking
公开(公告)号：US09641312B1
公开(公告)日：2017-05-02
申请号：US15172617
申请日：2016-06-03
Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATION
Inventor： Gerald R. Fischer
CPC classification number: H04L7/0016 , H03K9/04 , H04L7/0066 , H04L7/007 , H04L7/0079 , H04L7/0331 , H04L7/0334 , H04L7/046 , H04L7/10 , H04L25/4902
Abstract: A symbol clock recovery circuit for recovering a symbol clock in an M-ary pulse position modulation (PPM) signal. The recovery circuit includes a largest magnitude comparison circuit that selects a largest magnitude signal value from a group of M signal values aligned with a hypothesis symbol boundary location and the average of that largest magnitude value is compared with a threshold, or with results from other boundary location hypotheses, or with both, to determine the true position of the symbol boundary.
-
2.发明授权公开(公告)号：US09503294B1
公开(公告)日：2016-11-22
申请号：US15182452
申请日：2016-06-14
Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATION
Inventor： Marlon E. Marquez , Douglas S. Cockfield , Gerald R. Fischer , Matthew M. D'Amore
CPC classification number: H04L27/0008 , H03F1/02 , H03F3/24 , H04B1/0475 , H04B1/7172 , H04B2001/045 , H04L27/3405 , H04L27/368
Abstract: An amplitude and phase modulation circuit for modulating an M-ary digital signal having pulses onto a carrier wave for transmission by direct digital synthesis. The modulation circuit includes a digital source that generates a digital signal including pulses representing logical 1s and no pulses representing logical zeros, where a group of M pulses represents a constellation point to be transmitted. The modulation circuit further includes a phase control circuit that provides phase control and an amplitude control circuit that provides pulse width control for the constellation point to be transmitted. A saturated amplifier amplifies the phase and amplitude controlled digital signal and a filter integrates and averages the digital signal to remove noise from the signal so as to convert the digital signal to an analog signal, where the digital source operates to reduce the amplifier power consumption requirements.
Abstract translation: 一种幅度和相位调制电路，用于通过直接数字合成将具有脉冲的M数字信号调制到载波上以进行传输。 调制电路包括产生数字信号的数字源，该数字信号包括表示逻辑1的脉冲，无脉冲表示逻辑零，其中一组M个脉冲表示要发射的星座点。 调制电路还包括提供相位控制的相位控制电路和为要发送的星座点提供脉冲宽度控制的幅度控制电路。 饱和放大器放大相位和幅度受控的数字信号，并且滤波器对数字信号进行积分和平均以去除信号中的噪声，以将数字信号转换为模拟信号，其中数字源工作以降低放大器功耗要求 。
-
公开(公告)号：US10284358B1
公开(公告)日：2019-05-07
申请号：US15468198
申请日：2017-03-24
Applicant: Northrop Grumman Systems Corporation
Inventor： Cyrus Dhalla , Jonathan Krauss , Scott M. Takahashi , Gerald R. Fischer , Douglas S. Cockfield , Akop Gazdzhyan
Abstract: An embodiment generates a composite high speed clock with embedded frame synchronization using simple digital encoding of a high speed reference clock. The high speed reference clock and self-aligned frame synchronization signal are recovered by standard logic gate circuitry. The encoding and decoding circuits are comprised of basic digital logic gates with low propagation delay skew and timing jitter. The encoded clock is easier to transmit from source unit to destination unit over common transmission media (i.e., digital transceivers, amplifiers, splitters, connectors and coaxial cable) because only a single interface is required and because the encoding scheme reduces the composite clock to a minimal transmission bandwidth with constrained waveform harmonic content, relative to a low frequency frame sync with fast rise time that requires a broadband transmission media.
-
公开(公告)号：US10122527B1
公开(公告)日：2018-11-06
申请号：US15934890
申请日：2018-03-23
Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATION
Inventor： Gerald R. Fischer
Abstract: A clock recovery circuit for providing clock recovery from a burst signal that is periodically present and absent in a noisy channel. The recovery circuit includes an outer main tracking second-order phase locked loop (PLL) having an analog phase detector, a digital loop filter, and an analog/digital hybrid numerically controlled oscillator (NCO) that operates so that the clock recovery frequency is “frozen” to its last value from the previous burst and the phase detector is disabled during the gaps between data bursts. The NCO is implemented with an inner loop PLL that operates as a high resolution synthesizer having a low internal control bandwidth that preserves VCO phase noise. The outer main loop achieves a higher control bandwidth through direct tuning of the inner loop VCO with the outer loop tuning signal.
-
5.发明授权公开(公告)号：US09741245B1
公开(公告)日：2017-08-22
申请号：US15492359
申请日：2017-04-20
Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATION
Inventor： Gerald R. Fischer
CPC classification number: G08C23/04 , G02B26/0816 , H02N2/0075
Abstract: A reduced power consumption actuator drive circuit that includes separate circuit power paths for different portions of the signal spectrum for applications in which lower frequencies have high amplitudes. The low frequency circuit paths use higher power supply voltages at lower currents and the high frequency circuit paths use lower power supply voltages at higher currents. In one embodiment, the drive circuit drives a nutator that employs a resonating circuit that maintains actuator motion with reduced energy supplied by the power supply.
-
-
-
-
Search Results
5
records
(took 0.014 seconds)
