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公开(公告)号：US20210392286A1
公开(公告)日：2021-12-16
申请号：US16900576
申请日：2020-06-12
发明人： Hiroaki Ebihara , Rui Wang , John Brummer , Shan Chen
摘要： A pixel cell readout circuit includes a bitline input stage coupled to a bitline to receive an image signal from a pixel cell. A capacitor ratio circuit is coupled to the bitline input stage. A gain of the bitline input stage is responsive to a capacitor ratio provided by the capacitor ratio circuit to the bitline input stage. A switch control circuit is coupled to receive a gain signal. The switch control circuit is coupled to generate a randomized pattern selection signal coupled to be received by the capacitor ratio circuit to select the capacitor ratio provided by the capacitor ratio circuit in response to the gain signal.
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公开(公告)号：US20240276124A1
公开(公告)日：2024-08-15
申请号：US18167665
申请日：2023-02-10
发明人： Shan Chen , Hiroaki Ebihara , Rui Wang , Zhenfu Tian
摘要： A local ramp buffer includes a deep N− well layer disposed in a P− substrate beneath a surface of the P− substrate, a P− well disposed between the surface of the P− substrate and the deep N− well layer, and an N− well structure disposed in the P− substrate and coupled to the deep N− well layer. The N− well structure is disposed between the surface of the P− substrate and the deep N− well layer. The P− well is disposed inside an opening in the N− well structure. The N− well structure and the deep N− well layer are configured to isolate the P− well within the opening. A source follower transistor is disposed in the P− well. The source follower transistor includes a gate terminal coupled to the N− well structure and a ramp generator.
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公开(公告)号：US11770634B1
公开(公告)日：2023-09-26
申请号：US17719602
申请日：2022-04-13
发明人： Zhenfu Tian , Hiroaki Ebihara , Tao Sun , Yi Liu , Shan Chen
摘要： A ramp generator includes an operational amplifier having an output to generate a ramp signal. An integration current source is coupled to a first input and a reference voltage is coupled to a second input of the operational amplifier. A feedback capacitor is coupled between the first input and the output of the operational amplifier. A monitor circuit is coupled to the first and second inputs of the operational amplifier to generate an output flag in response to a comparison of the first and second inputs. A trimming control circuit is configured to generate a trimming signal in response to the output flag. An assist current source is configured to conduct an assist current from the output of the operational amplifier to ground in response the trimming signal generated by the trimming control circuit.
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公开(公告)号：US20230336889A1
公开(公告)日：2023-10-19
申请号：US17719602
申请日：2022-04-13
发明人： Zhenfu Tian , Hiroaki Ebihara , Tao Sun , Yi Liu , Shan Chen
CPC分类号： H04N5/378 , H03K4/08 , H04N5/3765
摘要： A ramp generator includes an operational amplifier having an output to generate a ramp signal. An integration current source is coupled to a first input and a reference voltage is coupled to a second input of the operational amplifier. A feedback capacitor is coupled between the first input and the output of the operational amplifier. A monitor circuit is coupled to the first and second inputs of the operational amplifier to generate an output flag in response to a comparison of the first and second inputs. A trimming control circuit is configured to generate a trimming signal in response to the output flag. An assist current source is configured to conduct an assist current from the output of the operational amplifier to ground in response the trimming signal generated by the trimming control circuit.
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公开(公告)号：US11240458B2
公开(公告)日：2022-02-01
申请号：US16900576
申请日：2020-06-12
发明人： Hiroaki Ebihara , Rui Wang , John Brummer , Shan Chen
摘要： A pixel cell readout circuit includes a bitline input stage coupled to a bitline to receive an image signal from a pixel cell. A capacitor ratio circuit is coupled to the bitline input stage. A gain of the bitline input stage is responsive to a capacitor ratio provided by the capacitor ratio circuit to the bitline input stage. A switch control circuit is coupled to receive a gain signal. The switch control circuit is coupled to generate a randomized pattern selection signal coupled to be received by the capacitor ratio circuit to select the capacitor ratio provided by the capacitor ratio circuit in response to the gain signal.
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公开(公告)号：US11128307B2
公开(公告)日：2021-09-21
申请号：US16175586
申请日：2018-10-30
发明人： Rui Wang , Yu-Shen Yang , Shan Chen , Min Qu
摘要： An analog to digital conversion (ADC) circuit includes a ramp circuit coupled to output a ramp signal, and the ramp signal is offset from a starting voltage by an offset voltage. The ramp signal ramps towards the starting voltage. A counter circuit is coupled to the ramp circuit to start counting after the ramp signal returns to the starting voltage, and a comparator is coupled to the counter circuit and a bitline to compare the ramp signal to a pixel signal voltage on the bitline. In response to the ramp signal equaling the pixel signal voltage, the comparator stops the counter.
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