Dark-current inhibiting image sensor and method

    公开(公告)号:US12107107B2

    公开(公告)日:2024-10-01

    申请号:US17530296

    申请日:2021-11-18

    Abstract: A dark-current-inhibiting image sensor includes a semiconductor substrate, a thin and a thin junction. The semiconductor substrate includes a front surface, a back surface opposite the front surface, a photodiode, and a concave surface between the front surface and the back surface. The concave surface extends from the back surface toward the front surface, and defines a trench that surrounds the photodiode in a cross-sectional plane parallel to the back surface. The thin junction extends from the concave surface into the semiconductor substrate, and is a region of the semiconductor substrate. The semiconductor substrate includes a first substrate region, located between the thin junction and the photodiode, that has a first conductive type. The photodiode and the thin junction have a second conductive type opposite the first conductive type.

    High K metal-insulator-metal (MIM) capacitor network for lag mitigation

    公开(公告)号:US12177589B2

    公开(公告)日:2024-12-24

    申请号:US18154770

    申请日:2023-01-13

    Abstract: A pixel circuit includes a photodiode configured to photogenerate image charge in response to incident light. A floating diffusion is coupled to receive the image charge from the photodiode. A transfer transistor is coupled between the photodiode and the floating diffusion. The transfer transistor is configured to transfer the image charge from the photodiode to the floating diffusion. A reset transistor is coupled between a reset voltage and the floating diffusion. A plurality of capacitor-switch pairs is coupled between the reset transistor and a bias voltage source. Each of the plurality of capacitor-switch pairs includes a lateral overflow integration capacitor (LOFIC) and a switch transistor coupled to the LOFIC.

    LOFIC CIRCUIT FOR IN PIXEL METAL-INSULATOR-METAL(MIM) CAPACITOR LAG CORRECTION AND ASSOCIATED CORRECTION METHODS

    公开(公告)号:US20240244344A1

    公开(公告)日:2024-07-18

    申请号:US18154715

    申请日:2023-01-13

    CPC classification number: H04N25/59 H01L27/14612 H01L27/14643 H04N25/771

    Abstract: A pixel circuit includes a photodiode configured to photogenerate image charge in response to incident light. A floating diffusion is coupled to receive the image charge from the photodiode. A transfer transistor is coupled between the photodiode and the floating diffusion. The transfer transistor is configured to transfer the image charge from the photodiode to the floating diffusion. A reset transistor is coupled between a reset voltage and the floating diffusion. A lateral overflow integration capacitor (LOFIC) network is coupled between the reset transistor and a bias voltage source. The LOFIC network includes a main LOFIC coupled between the reset transistor and the bias voltage source, and a plurality of subordinate capacitor-switch pairs, each including a subordinate LOFIC and a switch transistor coupled to the subordinate LOFIC. Each of the plurality of subordinate capacitor-switch pairs is coupled between the reset transistor and the bias voltage source.

    LOFIC circuit for in pixel metal-insulator-metal(MIM) capacitor lag correction and associated correction methods

    公开(公告)号:US12096141B2

    公开(公告)日:2024-09-17

    申请号:US18154715

    申请日:2023-01-13

    CPC classification number: H04N25/59 H01L27/14612 H01L27/14643 H04N25/771

    Abstract: A pixel circuit includes a photodiode configured to photogenerate image charge in response to incident light. A floating diffusion is coupled to receive the image charge from the photodiode. A transfer transistor is coupled between the photodiode and the floating diffusion. The transfer transistor is configured to transfer the image charge from the photodiode to the floating diffusion. A reset transistor is coupled between a reset voltage and the floating diffusion. A lateral overflow integration capacitor (LOFIC) network is coupled between the reset transistor and a bias voltage source. The LOFIC network includes a main LOFIC coupled between the reset transistor and the bias voltage source, and a plurality of subordinate capacitor-switch pairs, each including a subordinate LOFIC and a switch transistor coupled to the subordinate LOFIC. Each of the plurality of subordinate capacitor-switch pairs is coupled between the reset transistor and the bias voltage source.

    HIGH K METAL-INSULATOR-METAL (MIM) CAPACITOR NETWORK FOR LAG MITIGATION

    公开(公告)号:US20240244350A1

    公开(公告)日:2024-07-18

    申请号:US18154770

    申请日:2023-01-13

    CPC classification number: H04N25/77

    Abstract: A pixel circuit includes a photodiode configured to photogenerate image charge in response to incident light. A floating diffusion is coupled to receive the image charge from the photodiode. A transfer transistor is coupled between the photodiode and the floating diffusion. The transfer transistor is configured to transfer the image charge from the photodiode to the floating diffusion. A reset transistor is coupled between a reset voltage and the floating diffusion. A plurality of capacitor-switch pairs is coupled between the reset transistor and a bias voltage source. Each of the plurality of capacitor-switch pairs includes a lateral overflow integration capacitor (LOFIC) and a switch transistor coupled to the LOFIC.

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