公开(公告)号：US11626434B2

公开(公告)日：2023-04-11

申请号：US17530358

申请日：2021-11-18

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Wei-Feng Lin ,  Ying-Chih Kuo ,  Ying Chung

IPC: H01L27/146

Abstract: A method of image sensor package fabrication includes forming a recess in a transparent substrate, depositing conductive traces in the recess, inserting an image sensor in the recess so that the image sensor is positioned in the recess to receive light through the transparent substrate, and inserting a circuit board in the recess so that the image sensor is positioned between the transparent substrate and the circuit board.

公开(公告)号：US11056529B2

公开(公告)日：2021-07-06

申请号：US16600047

申请日：2019-10-11

Applicant: OmniVision Technologies, Inc.

Inventor： Chien-Chan Yeh ,  Ying-Chih Kuo

IPC: H01L31/062 ,  H01L31/113 ,  H01L27/146

Abstract: A method for fabricating an image-sensor chip-scale package includes bonding, with temporary adhesive, a glass wafer to a device wafer including an array of image sensors. The method also includes forming an isolated-die wafer by removing, from the device wafer, each of a plurality of inter-sensor regions each located between a respective pair of image sensors of the array of image sensors. The isolated-die wafer includes a plurality of image-sensor dies each including a respective image sensor, of the array of image sensors, bonded to the glass wafer. The method also includes encapsulating the isolated-die wafer to form an encapsulated-die wafer; removing, from each of the plurality of image-sensor dies, a respective region of the glass wafer covering the respective image sensor; and singulating the encapsulated-die wafer.

公开(公告)号：US20210193716A1

公开(公告)日：2021-06-24

申请号：US16725698

申请日：2019-12-23

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Wei-Feng Lin ,  Ying-Chih Kuo ,  Ying Chung

IPC: H01L27/146

Abstract: An image sensor package includes a transparent substrate with a recess formed in the transparent substrate, and an image sensor positioned in the recess so that light incident on the transparent substrate passes through the transparent substrate to the image sensor. The image sensor package also includes a circuit board electrically disposed in the recess and coupled to receive image data from the image sensor, and the image sensor is positioned in the recess between the circuit board and the transparent substrate.

公开(公告)号：US10998285B2

公开(公告)日：2021-05-04

申请号：US16257136

申请日：2019-01-25

Applicant: OmniVision Technologies, Inc.

Inventor： Chien-Chan Yeh ,  Ying-Chih Kuo

IPC: H01L21/78 ,  H01L23/00 ,  H01L23/31 ,  H01L23/544

Abstract: A chip comprises a semiconductor substrate having a first side and a second side opposite to the first side, a plurality of conductive metal patterns formed on the first side of the semiconductor substrate, a plurality of solder balls formed on the first side of the semiconductor substrate, and at least one code pattern of a first group and at least one code pattern of a second group formed on the first side of the semiconductor substrate in a space free from the plurality of conductive metal patterns and the plurality of solder balls, wherein the code patterns are visible from a backside of the chip, and wherein a tracing number of the chip is represented by the code patterns.

公开(公告)号：US11211414B2

公开(公告)日：2021-12-28

申请号：US16725698

申请日：2019-12-23

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Wei-Feng Lin ,  Ying-Chih Kuo ,  Ying Chung

IPC: H01L27/146

Abstract: An image sensor package includes a transparent substrate with a recess formed in the transparent substrate, and an image sensor positioned in the recess so that light incident on the transparent substrate passes through the transparent substrate to the image sensor. The image sensor package also includes a circuit board electrically disposed in the recess and coupled to receive image data from the image sensor, and the image sensor is positioned in the recess between the circuit board and the transparent substrate.

公开(公告)号：US10199333B2

公开(公告)日：2019-02-05

申请号：US15642132

申请日：2017-07-05

Applicant: OmniVision Technologies, Inc.

Inventor： Ying-Chih Kuo ,  Ying Chung

IPC: H01L23/00 ,  H01L27/146

Abstract: A delamination-resistant semiconductor device includes a conductive layer, a semiconductor layer, and a spacer. The conductive layer has a first side opposite a second side. The semiconductor layer is on the first side and defines an aperture therethrough spanned by the conductive layer. The spacer is on the second side and has a top surface, proximate the conductive layer, that defines a blind hole spanned by the conductive layer. A method for preventing delamination of a multilayer structure, includes a step of disposing a first layer on a substrate such that the first layer spans an aperture of the substrate. The method also includes a step of disposing a second layer on the first layer. The second layer has a blind hole adjacent to the first layer such that the first layer spans the blind hole.

公开(公告)号：US10020335B2

公开(公告)日：2018-07-10

申请号：US15261444

申请日：2016-09-09

Applicant: OmniVision Technologies, Inc.

Inventor： Wei-Chih Chien ,  Ying-Chih Kuo

IPC: H01L23/48 ,  H01L21/44 ,  H01L27/146

CPC classification number: H01L27/14632 ,  H01L27/14618 ,  H01L27/14636 ,  H01L27/14683 ,  H01L27/14687 ,  H01L2224/11

Abstract: A short-resistant CSP includes an isolation layer, an electrically conductive RDL, and an insulating layer. The electrically conductive RDL is on the isolation layer and includes a first and a second RDL segment. The insulating layer includes a first insulator portion between the isolation layer and the first RDL segment to improve electrical isolation between the first and second RDL segments. A method for preventing short-circuiting between conductors of CSP includes (1) depositing a first insulating layer on a first substrate region, (2) depositing a RDL segment on the substrate above the first substrate region, at least a portion of the first insulating layer being between the first RDL segment and the first substrate region, and (3) depositing a second RDL segment on the substrate above a second substrate region, such that the first insulating layer interrupts a leakage current path between the first and second RDL segments.

公开(公告)号：US11114483B2

公开(公告)日：2021-09-07

申请号：US16100835

申请日：2018-08-10

Applicant: OmniVision Technologies, Inc.

Inventor： Chien-Chan Yeh ,  Ying-Chih Kuo ,  Wei-Feng Lin ,  Chun-Sheng Fan

IPC: H01L27/146 ,  G02F1/133 ,  G02F1/1335

Abstract: A cavityless chip-scale image-sensor package includes a substrate, a microlens array, and a low-index layer. The substrate includes a plurality of pixels forming a pixel array. The microlens array includes a plurality of microlenses each (i) having a lens refractive index, (ii) being aligned to a respective one of the plurality of pixels and (iii) having a non-planar microlens surfaces facing away from the respective one of the plurality of pixels. The low-index layer has a first refractive index less than the lens refractive index. The low-index layer also includes a bottom surface, at least part of which is conformal to each non-planar microlens surface. The microlens array is between the pixel array and the low-index layer.

公开(公告)号：US20200243472A1

公开(公告)日：2020-07-30

申请号：US16257136

申请日：2019-01-25

Applicant: OmniVision Technologies, Inc.

Inventor： Chien-Chan Yeh ,  Ying-Chih Kuo

IPC: H01L23/00 ,  H01L23/544 ,  H01L23/31

Abstract: A chip comprises a semiconductor substrate having a first side and a second side opposite to the first side, a plurality of conductive metal patterns formed on the first side of the semiconductor substrate, a plurality of solder balls formed on the first side of the semiconductor substrate, and at least one code pattern of a first group and at least one code pattern of a second group formed on the first side of the semiconductor substrate in a space free from the plurality of conductive metal patterns and the plurality of solder balls, wherein the code patterns are visible from a backside of the chip, and wherein a tracing number of the chip is represented by the code patterns.

公开(公告)号：US20180076248A1

公开(公告)日：2018-03-15

申请号：US15261444

申请日：2016-09-09

Applicant: OmniVision Technologies, Inc.

Inventor： Wei-Chih Chien ,  Ying-Chih Kuo

IPC: H01L27/146

CPC classification number: H01L27/14632 ,  H01L27/14618 ,  H01L27/14636 ,  H01L27/14683 ,  H01L27/14687

Abstract: A short-resistant CSP includes an isolation layer, an electrically conductive RDL, and an insulating layer. The electrically conductive RDL is on the isolation layer and includes a first and a second RDL segment. The insulating layer includes a first insulator portion between the isolation layer and the first RDL segment to improve electrical isolation between the first and second RDL segments. A method for preventing short-circuiting between conductors of CSP includes (1) depositing a first insulating layer on a first substrate region, (2) depositing a RDL segment on the substrate above the first substrate region, at least a portion of the first insulating layer being between the first RDL segment and the first substrate region, and (3) depositing a second RDL segment on the substrate above a second substrate region, such that the first insulating layer interrupts a leakage current path between the first and second RDL segments.