公开(公告)号：US20160276545A1

公开(公告)日：2016-09-22

申请号：US15033157

申请日：2014-10-16

Applicant: OSRAM OPTO SEMICONDUCTORS GMBH

Inventor： Johannes Mueller ,  Christoph Koller ,  Thomas Schwarz ,  Frank Singer

IPC: H01L33/48 ,  H01L33/00 ,  H01L33/60 ,  H01L33/54 ,  H01L33/62

CPC classification number: H01L33/486 ,  H01L24/24 ,  H01L33/005 ,  H01L33/54 ,  H01L33/60 ,  H01L33/62 ,  H01L2924/12041 ,  H01L2924/15787 ,  H01L2933/0033 ,  H01L2933/005 ,  H01L2933/0066 ,  H01L2924/00

Abstract: In various embodiments, a method for producing an electronic component is provided. The method includes applying an adhesive layer to a carrier, initially curing the adhesive layer applied to the carrier, providing a chip, wherein the chip has a substrate and a layer sequence arranged on the substrate, laying the chip onto the initially cured adhesive layer by way of a top side of the layer sequence, embedding the chip into a shaped body, wherein the top side of the layer sequence and a first side of the shaped body lie substantially in a plane, separating the embedded chip from the adhesive layer and the carrier, and applying an electrically conductive structure to the first side of the shaped body, the shaped body forming a vertical electrical insulation between the electrically conductive structure and the substrate.

Abstract translation: 在各种实施例中，提供了一种用于制造电子部件的方法。 该方法包括将粘合剂层施加到载体上，最初固化施加到载体上的粘合剂层，提供芯片，其中芯片具有衬底和布置在衬底上的层序列，将芯片铺设在初始固化的粘合剂层上 层序列的顶侧的方式，将芯片嵌入成形体中，其中层序列的顶侧和成形体的第一侧基本上位于平面中，将嵌入的芯片与粘合剂层分离，并且 载体，并且将导电结构施加到成形体的第一侧，成形体在导电结构和基板之间形成垂直的电绝缘。