中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

16 records (took 0.014 seconds)

    Hardware accelerated data processing operations for storage data
    1.
    发明授权
    Hardware accelerated data processing operations for storage data 有权

    公开(公告)号：US10963295B2

    公开(公告)日：2021-03-30

    申请号：US15699027

    申请日：2017-09-08

    Applicant: Oracle International Corporation

    Inventor： John R. Feehrer ,  Milton Shih ,  Matthew Cohen ,  Kenneth Chan ,  Ramaswamy Sivaramakrishnan ,  Julia Harper ,  Peter Dunlap

    IPC: G06F9/48 ,  G06F21/60 ,  G06F11/07 ,  G06F13/42 ,  G06F11/10

    Abstract: A method and system for processing data are disclosed. A processor, in response to executing a software program, may write an entry in a work queue. The entry may include an operation, and a location of data stored in an input buffer, and a location in an output buffer to write processed data. The processor may also generate a notification that at least one entry in the work queue is ready to be processed. The data transformation unit may assign the entry to a data transformation circuit, and retrieve the data from the input buffer using the location. The data transformation unit may also perform to the operation on the retrieved data to generate updated data, generate a completion message in response to completion of the operation, and store the updated data in an output buffer. An interface unit may relay transactions between the processor and the data transformation unit.

    AGGREGATION OF INTERRUPTS USING EVENT QUEUES
    3.
    发明申请
    AGGREGATION OF INTERRUPTS USING EVENT QUEUES 审中-公开

    公开(公告)号：US20180246826A1

    公开(公告)日：2018-08-30

    申请号：US15960301

    申请日：2018-04-23

    Applicant: Oracle International Corporation

    Inventor： John R. Feehrer ,  Patrick Stabile ,  Hugh R. Kurth ,  David M. Kahn

    IPC: G06F13/24 ,  G06F13/16 ,  G06F13/40

    CPC classification number: G06F13/24 ,  G06F13/16 ,  G06F13/1605 ,  G06F13/4068

    Abstract: Embodiments of input/output hub unit are disclosed for aggregating interrupts received from multiple endpoint devices. The input/output hub may include an interface unit and one or more communication units. Each communication unit may be configured to receive messages from a corresponding endpoint device. The interface unit may be configured to update a first pointer within a first data structure responsive to a request from a given one of the communication units. The interface unit may be further configured to stored data in a second data structure responsive to updating the first pointer, reading a second pointer and the first pointer, and sending an interrupt responsive to a determination that the first and second pointers are equal.

    HARDWARE ACCELERATED DATA PROCESSING OPERATIONS FOR STORAGE DATA
    4.
    发明申请
    HARDWARE ACCELERATED DATA PROCESSING OPERATIONS FOR STORAGE DATA 审中-公开

    公开(公告)号：US20190079795A1

    公开(公告)日：2019-03-14

    申请号：US15699027

    申请日：2017-09-08

    Applicant: Oracle International Corporation

    Inventor： John R. Feehrer ,  Milton Shih ,  Matthew Cohen ,  Kenneth Chan ,  Ramaswamy Sivaramakrishnan ,  Julia Harper ,  Peter Dunlap

    IPC: G06F9/48 ,  G06F13/42 ,  G06F11/07 ,  G06F21/60

    Abstract: A method and system for processing data are disclosed. A processor, in response to executing a software program, may write an entry in a work queue. The entry may include an operation, and a location of data stored in an input buffer, and a location in an output buffer to write processed data. The processor may also generate a notification that at least one entry in the work queue is ready to be processed. The data transformation unit may assign the entry to a data transformation circuit, and retrieve the data from the input buffer using the location. The data transformation unit may also perform to the operation on the retrieved data to generate updated data, generate a completion message in response to completion of the operation, and store the updated data in an output buffer. An interface unit may relay transactions between the processor and the data transformation unit.

    Aggregation of interrupts using event queues
    5.
    发明授权
    Aggregation of interrupts using event queues 有权

    公开(公告)号：US09952989B2

    公开(公告)日：2018-04-24

    申请号：US15277146

    申请日：2016-09-27

    Applicant: Oracle International Corporation

    Inventor： John R. Feehrer ,  Patrick Stabile ,  Hugh R. Kurth ,  David M. Kahn

    IPC: G06F13/24 ,  G06F13/16 ,  G06F13/40

    CPC classification number: G06F13/24 ,  G06F13/16 ,  G06F13/1605 ,  G06F13/4068

    Abstract: Embodiments of input/output hub unit are disclosed for aggregating interrupts received from multiple endpoint devices. The input/output hub may include an interface unit and one or more communication units. Each communication unit may be configured to receive messages from a corresponding endpoint device. The interface unit may be configured to update a first pointer within a first data structure responsive to a request from a given one of the communication units. The interface unit may be further configured to stored data in a second data structure responsive to updating the first pointer, reading a second pointer and the first pointer, and sending an interrupt responsive to a determination that the first and second pointers are equal.

    Separation of control and data plane functions in SoC virtualized I/O device
    6.
    发明授权
    Separation of control and data plane functions in SoC virtualized I/O device 有权

    公开(公告)号：US10853303B2

    公开(公告)日：2020-12-01

    申请号：US14944835

    申请日：2015-11-18

    Applicant: Oracle International Corporation

    Inventor： John R. Feehrer ,  Matthew Cohen ,  Rahoul Puri ,  John Johnson ,  Alan Adamson ,  Julia Harper

    IPC: G06F9/455 ,  G06F13/42 ,  G06F13/40 ,  G06F13/10

    Abstract: An apparatus and method for controlling a virtualized endpoint device are disclosed. A processor may be configured to execute instructions included in multiple execution threads. A first device may be configured to perform multiple command and data functions, and a communication unit may include a first port coupled to the first device via a first link and be configured to send instructions from the processor to the first device via the first link using a first communication protocol. The processor may be further configured to execute first and second sets of commands included in respective execution threads. The first set of commands may be associated with the plurality of command functions and the second set of commands may be associated with the plurality of data functions.

    Correctable error filtering for input/output subsystem
    7.
    发明授权
    Correctable error filtering for input/output subsystem 有权

    公开(公告)号：US10078543B2

    公开(公告)日：2018-09-18

    申请号：US15167601

    申请日：2016-05-27

    Applicant: Oracle International Corporation

    Inventor： John E. Watkins ,  Joseph R. Wright ,  John R. Feehrer

    IPC: G06F11/00 ,  G06F11/07

    CPC classification number: G06F11/0781 ,  G06F11/076

    Abstract: A switched fabric hierarchy (e.g., a PCIe hierarchy) may utilize hardware, firmware, and/or software for filtering duplicative or otherwise undesirable correctable error messages from reaching a root complex. An operating system of the root complex may detect a persistent stream or storm of correctable errors from a particular endpoint and activate filtering of correctable errors from that endpoint. A filtering device may receive filtering commands and parameters from the operating system, implement the filtering, and monitor further correctable errors from the offending device. While an offending device is being filtered, correctable error messages from the offending device may be masked from the operating system, while correctable error messages from other devices in the switched fabric hierarchy may be transmitted. At such time as the filtering device may detect that conditions for ending filtering of a device are met, the filtering device may cease filtering of the offending device and return monitoring responsibilities to the operating system.

    AGGREGATION OF INTERRUPTS USING EVENT QUEUES
    9.
    发明申请
    AGGREGATION OF INTERRUPTS USING EVENT QUEUES 审中-公开
    使用事件排队中断的聚合

    公开(公告)号：US20170017589A1

    公开(公告)日：2017-01-19

    申请号：US15277146

    申请日：2016-09-27

    Applicant: Oracle International Corporation

    Inventor： John R. Feehrer ,  Patrick Stabile ,  Hugh R. Kurth ,  David M. Kahn

    IPC: G06F13/24 ,  G06F13/40 ,  G06F13/16

    CPC classification number: G06F13/24 ,  G06F13/16 ,  G06F13/1605 ,  G06F13/4068

    Abstract: Embodiments of input/output hub unit are disclosed for aggregating interrupts received from multiple endpoint devices. The input/output hub may include an interface unit and one or more communication units. Each communication unit may be configured to receive messages from a corresponding endpoint device. The interface unit may be configured to update a first pointer within a first data structure responsive to a request from a given one of the communication units. The interface unit may be further configured to stored data in a second data structure responsive to updating the first pointer, reading a second pointer and the first pointer, and sending an interrupt responsive to a determination that the first and second pointers are equal.

    Abstract translation: 公开了输入/输出集线器单元的实施例，用于聚合从多个端点设备接收的中断。 输入/输出集线器可以包括接口单元和一个或多个通信单元。 每个通信单元可以被配置为从相应的端点设备接收消息。 接口单元可以被配置为响应于来自给定的一个通信单元的请求来更新第一数据结构内的第一指针。 接口单元还可以被配置为响应于更新第一指针，读取第二指针和第一指针而响应于第一和第二指针相等的确定发送中断，将数据存储在第二数据结构中。

Patent Agency Ranking