公开(公告)号：US06599437B2

公开(公告)日：2003-07-29

申请号：US09813392

申请日：2001-03-20

申请人： Oranna Yauw ,  Meihua Shen ,  Nicolas Gani ,  Jeffrey D. Chinn

发明人： Oranna Yauw ,  Meihua Shen ,  Nicolas Gani ,  Jeffrey D. Chinn

IPC分类号： H01L213213

CPC分类号： H01L21/0276 ,  H01L21/31138

摘要： A two-step method of etching an organic coating layer, in particular, an organic antireflection coating (ARC) layer, is disclosed. During the main etch step, the organic coating layer is etched using a plasma generated from a first source gas which includes a fluorocarbon and a non-carbon-containing, halogen-comprising gas. Etching is performed using a first substrate bias power. During the overetch step, residual organic coating material remaining after the main etch step is removed by exposing the substrate to a plasma generated from a second source gas which includes a chlorine-containing gas and an oxygen-containing gas, and which does not include a polymer-forming gas. The overetch step is performed using a second substrate bias power which is less than the first substrate bias power. The first source gas and first substrate bias power provide a higher etch rate in dense feature areas than in isolated feature areas during the main etch step, whereas the second source gas and second substrate bias power provide a higher etch rate in isolated feature areas than in dense feature areas during the overetch step, resulting in an overall balancing effect.

摘要翻译： 公开了蚀刻有机涂层，特别是有机抗反射涂层（ARC）层的两步法。 在主蚀刻步骤期间，使用由包括碳氟化合物和非含碳卤素气体的第一源气体产生的等离子体蚀刻有机涂层。 使用第一衬底偏置功率进行蚀刻。 在过蚀刻步骤期间，通过将衬底暴露于由包含含氯气体和含氧气体的第二源气体产生的等离子体而将主蚀刻步骤后剩余的残留有机涂层材料除去，并且不包括 聚合物形成气体。 使用小于第一衬底偏置功率的第二衬底偏置功率来执行过蚀刻步骤。 在主蚀刻步骤期间，第一源气体和第一衬底偏置功率在致密特征区域中提供比在隔离特征区域中更高的蚀刻速率，而第二源气体和第二衬底偏置功率在隔离特征区域中提供比在 在疏浚过程中密集的特征区域，导致整体平衡效果。

公开(公告)号：US06933243B2

公开(公告)日：2005-08-23

申请号：US10279320

申请日：2002-10-23

申请人： Meihua Shen ,  Yan Du ,  Nicolas Gani ,  Oranna Yauw ,  Hakeem M. Oluseyi

发明人： Meihua Shen ,  Yan Du ,  Nicolas Gani ,  Oranna Yauw ,  Hakeem M. Oluseyi

IPC分类号： H01L21/28 ,  H01L21/3213 ,  H01L29/49 ,  H01L21/302

CPC分类号： H01L21/28088 ,  H01L21/32136 ,  H01L29/4966

摘要： Methods for etching electrodes formed directly on gate dielectrics are provided. In one aspect, an etch process is provided which includes a main etch step, a soft landing step, and an over etch step. In another aspect, a method is described which includes performing a main etch having good etch rate uniformity and good profile uniformity, performing a soft landing step in which a metal/metal barrier interface can be determined, and performing an over etch step to selectively remove the metal barrier without negatively affecting the dielectric. In another aspect, a method is provided which includes a first non-selective etch chemistry for bulk removal of electrode material, a second intermediate selective etch chemistry with end point capability, and then a selective etch chemistry to stop on the gate dielectric.

摘要翻译： 提供了直接形成在栅极电介质上的蚀刻电极的方法。 在一个方面，提供了一种蚀刻工艺，其包括主蚀刻步骤，软着色步骤和过蚀刻步骤。 在另一方面，描述了一种方法，其包括执行具有良好蚀刻速率均匀性和良好轮廓均匀性的主蚀刻，执行软着色步骤，其中可以确定金属/金属屏障界面，以及执行过蚀刻步骤以选择性地去除 金属屏障，而不会对电介质产生负面影响。 在另一方面，提供了一种方法，其包括用于大量去除电极材料的第一非选择性蚀刻化学品，具有端点能力的第二中间选择性蚀刻化学品，然后选择蚀刻化学物质停止在栅极电介质上。

公开(公告)号：US06551941B2

公开(公告)日：2003-04-22

申请号：US09791446

申请日：2001-02-22

申请人： Chan-syun David Yang ,  Meihua Shen ,  Oranna Yauw ,  Jeffrey D. Chinn

发明人： Chan-syun David Yang ,  Meihua Shen ,  Oranna Yauw ,  Jeffrey D. Chinn

IPC分类号： H01L2100

CPC分类号： H01L21/32137 ,  H01L21/28114 ,  H01L21/28123

摘要： A method of forming a notch silicon-containing gate structure is disclosed. This method is particularly useful in forming a T-shaped silicon-containing gate structure. A silicon-containing gate layer is etched to a first desired depth using a plasma generated from a first source gas. During the etch, etch byproducts deposit on upper sidewalls of the silicon-containing gate layer which are exposed during etching, forming a first passivation layer which protects the upper silicon-containing gate layer sidewalls from etching during subsequent processing steps. A relatively high substrate bias power is used during this first etch step to ensure that the passivation layer adheres properly to the upper silicon-containing gate sidewalls. The remaining portion of the silicon-containing gate layer is etched at a lower bias power using a plasma generated from a second source gas which selectively etches the silicon-containing gate layer relative to the underlying gate dielectric layer, whereby a lower sidewall of the silicon-containing gate layer is formed and an upper surface of the gate dielectric layer is exposed. The etch stack is then exposed to a plasma generated from a third source gas which includes nitrogen, whereby a second, nitrogen-containing passivation layer is formed on the exposed sidewalls of the silicon-containing gate layer. Subsequently, a notch is etched in the lower sidewall of the silicon-containing gate layer. The method of the invention provides control over both the height and the width of the notch, while providing a marked improvement in notch critical dimension uniformity between isolated and dense feature areas of the substrate.

摘要翻译： 公开了一种形成缺口含硅栅极结构的方法。 该方法在形成T形含硅栅极结构中特别有用。 使用从第一源气体产生的等离子体将含硅栅极层蚀刻到第一期望深度。 在蚀刻期间，蚀刻副产物沉积在蚀刻期间暴露的含硅栅极层的上侧壁上，形成第一钝化层，其在随后的处理步骤期间保护上部含硅栅极层侧壁免受蚀刻。 在该第一蚀刻步骤期间使用相对较高的衬底偏置功率以确保钝化层适当地粘附到上部含硅栅极侧壁。 使用从第二源气体产生的等离子体以较低的偏置功率蚀刻剩余部分的含硅栅极层，该等离子体选择性地相对于下面的栅介质层蚀刻含硅栅极层，由此硅的下侧壁 形成栅极层，并且露出栅极电介质层的上表面。 然后将蚀刻堆叠暴露于由包括氮的第三源气体产生的等离子体，由此在含硅栅极层的暴露的侧壁上形成第二含氮钝化层。 随后，在含硅栅极层的下侧壁蚀刻凹口。 本发明的方法提供对凹口的高度和宽度的控制，同时提供了衬底的隔离和致密特征区域之间的切口临界尺寸均匀性的显着改进。

公开(公告)号：US06797188B1

公开(公告)日：2004-09-28

申请号：US09507629

申请日：2000-02-18

申请人： Meihua Shen ,  Wei-nan Jiang ,  Oranna Yauw ,  Jeffrey Chinn

发明人： Meihua Shen ,  Wei-nan Jiang ,  Oranna Yauw ,  Jeffrey Chinn

IPC分类号： H01L2100

CPC分类号： H01L21/02071 ,  H01L21/32137 ,  Y10S438/905

摘要： A method of etching a silicon-containing material in a substrate comprises placing the substrate in a process chamber and exposing the substrate to an energized gas comprising fluorine-containing gas, chlorine-containing gas and sidewall-passivation gas. The silicon-containing material on the substrate comprises regions having different compositions, and the volumetric flow ratio of the fluorine-containing gas, chlorine-containing gas, and sidewall-passivation gas is selected to etch the compositionally different regions at substantially similar etch rates.

摘要翻译： 在衬底中蚀刻含硅材料的方法包括将衬底放置在处理室中，并将衬底暴露于包含含氟气体，含氯气体和侧壁钝化气体的赋能气体中。 衬底上的含硅材料包括具有不同组成的区域，并且选择含氟气体，含氯气体和侧壁钝化气体的体积流量比以基本相似的蚀刻速率蚀刻组成不同的区域。

公开(公告)号：US20130087174A1

公开(公告)日：2013-04-11

申请号：US13614365

申请日：2012-09-13

申请人： Noel Sun ,  Meihua Shen ,  Nicolas Gani ,  Chung Nang Liu ,  Radhika C. Mani

发明人： Noel Sun ,  Meihua Shen ,  Nicolas Gani ,  Chung Nang Liu ,  Radhika C. Mani

IPC分类号： B08B5/00

CPC分类号： B08B5/00 ,  B08B7/0035 ,  C23C16/4405 ,  H01J37/32449 ,  H01J37/32862 ,  Y10S438/905

摘要： Embodiments of the invention include methods for in-situ chamber dry cleaning a plasma processing chamber utilized for gate structure fabrication process in semiconductor devices. In one embodiment, a method for in-situ chamber dry clean includes supplying a first cleaning gas including at least a boron containing gas into a processing chamber in absence of a substrate disposed therein, supplying a second cleaning gas including at least a halogen containing gas into the processing chamber in absence of the substrate, and supplying a third cleaning gas including at least an oxygen containing gas into the processing chamber in absence of the substrate.

摘要翻译： 本发明的实施例包括用于半导体器件中用于栅极结构制造工艺的等离子体处理室的原位室干洗的方法。 在一个实施例中，一种用于原位室干洗的方法包括在不存在设置在其中的基板的情况下将包括至少含硼气体的第一清洁气体供应到处理室中，提供至少包含含卤素气体的第二清洁气体 在没有基板的情况下进入处理室，并且在没有基板的情况下将至少包含含氧气体的第三清洁气体供应到处理室中。

公开(公告)号：US20090221149A1

公开(公告)日：2009-09-03

申请号：US12039262

申请日：2008-02-28

申请人： Edward P. Hammond, IV ,  Rodolfo P. Belen ,  Nicolas Gani ,  Jing Zou ,  Meihua Shen ,  Michael D. Willwerth ,  David Palagashvili

发明人： Edward P. Hammond, IV ,  Rodolfo P. Belen ,  Nicolas Gani ,  Jing Zou ,  Meihua Shen ,  Michael D. Willwerth ,  David Palagashvili

IPC分类号： H01L21/306

CPC分类号： H01J37/32449 ,  H01J37/3244

摘要： An apparatus having a multiple gas injection port system for providing a high uniform etching rate across the substrate is provided. In one embodiment, the apparatus includes a nozzle in the semiconductor processing apparatus having a hollow cylindrical body having a first outer diameter defining a hollow cylindrical sleeve and a second outer diameter defining a tip, a longitudinal passage formed longitudinally through the body of the hollow cylindrical sleeve and at least partially extending to the tip, and a lateral passage formed in the tip coupled to the longitudinal passage, the lateral passage extending outward from the longitudinal passage having an opening formed on an outer surface of the tip.

摘要翻译： 提供了一种具有多个气体注入端口系统的设备，用于在衬底上提供高均匀的蚀刻速率。 在一个实施例中，该设备包括在半导体处理设备中的喷嘴，其具有中空圆柱体，其具有限定中空圆柱形套筒的第一外径和限定尖端的第二外径，纵向通道纵向穿过中空圆柱体 并且至少部分地延伸到尖端，以及形成在连接到纵向通道的尖端中的侧向通道，从纵向通道向外延伸的侧向通道具有形成在尖端的外表面上的开口。

公开(公告)号：US06635573B2

公开(公告)日：2003-10-21

申请号：US10040109

申请日：2001-10-29

申请人： Wilfred Pau ,  Meihua Shen ,  Jeffrey D. Chinn

发明人： Wilfred Pau ,  Meihua Shen ,  Jeffrey D. Chinn

IPC分类号： H01L21302

CPC分类号： H01L22/26 ,  H01L21/32137

摘要： We have discovered a method of detecting the approach of an endpoint during the etching of a material within a recess such as a trench or a contact via. The method provides a clear and distinct inflection endpoint signal, even for areas of a substrate containing isolated features. The method includes etching the material in the recess and using thin film interferometric endpoint detection to detect an endpoint of the etch process, where the interferometric incident light beam wavelength is tailored to the material being etched; the spot size of the substrate illuminated by the light beam is sufficient to provide adequate signal intensity from the material being etched; and the refractive index of the material being etched is sufficiently different from the refractive index of other materials contributing to reflected light from the substrate, that the combination of the light beam wavelength, the spot size, and the difference in refractive index provides a clear and distinct endpoint signal.

摘要翻译： 我们已经发现了在凹槽（例如沟槽或接触通孔）内蚀刻材料期间检测端点的接近方法。 该方法提供清晰和明确的拐点端点信号，即使对于包含隔离特征的基板的区域也是如此。 该方法包括蚀刻凹陷中的材料并使用薄膜干涉测量端点检测来检测蚀刻过程的终点，其中干涉入射光束波长适合被蚀刻的材料; 由光束照射的基板的光斑尺寸足以从被蚀刻的材料提供足够的信号强度; 并且被蚀刻的材料的折射率与其他有助于来自衬底的反射光的材料的折射率充分不同，光束波长，光点尺寸和折射率差的组合提供了清晰和 不同的端点信号。

公开(公告)号：US06383941B1

公开(公告)日：2002-05-07

申请号：US09611085

申请日：2000-07-06

申请人： Meihua Shen ,  Kenju Nishikido ,  Jeffrey D. Chinn ,  Dragan Podlesnik

发明人： Meihua Shen ,  Kenju Nishikido ,  Jeffrey D. Chinn ,  Dragan Podlesnik

IPC分类号： H01L2100

CPC分类号： H01L21/31138 ,  H01L21/0276 ,  H01L21/3065

摘要： The present disclosure relates to semiconductor processing, and to the plasma etching of organic layers, and in particular antireflective coating layers. We have discovered a particular combination of gases useful in producing chemically reactive plasma species, which provides unexpected control over etched feature critical dimension, etch profile, and uniformity of etch across a substrate surface, despite a difference in the spacing of etched features over the substrate surface. The combination of gases which produces chemically reactive plasma species consists essentially of CxHyFz, a bromine-comprising compound (which is typically HBr), and O2, where x ranges from 1 to 4, y ranges from 0 to 3, and z ranges from 1 to 10. Oxygen atoms may be substituted for hydrogen atoms in the CxHyFz compound to a limited extent Essentially inert gases which do not produce chemically reactive species may be added to the combination of etchant-species producing gases. A combination of CF4/HBr/O2 has been demonstrated to work well. With this combination of plasma source gases, critical Dimension (CD) uniformity control across the surface of the substrate is generally improved by using a volumetric ratio of CxHyFz:HBr ranging from about 2:1 to about 5:1, with a range of about 3:1 to about 4:1 being preferred. An increased plasma density also helps improve CD uniformity control. The volumetric ratio of (CxHyFz+HBr):O2 should range between about 1:1 to 5:1, with a range of about 2:1 to about 3:1 being preferred.

摘要翻译： 本公开涉及半导体处理，以及有机层的等离子体蚀刻，特别是抗反射涂层。 我们已经发现了可用于生产化学反应性等离子体物质的特定气体组合，尽管蚀刻特征在衬底上的间隔有差异，但是它们对蚀刻特征临界尺寸，蚀刻轮廓以及衬底表面上的蚀刻均匀性提供了意想不到的控制 表面。 产生化学反应性等离子体物质的气体的组合基本上由CxHyFz，含溴化合物（通常为HBr）和O 2组成，其中x为1至4，y为0至3，z的范围为1 氧原子可以在有限的程度上代替CxHyFz化合物中的氢原子。基本上不产生化学反应性物质的惰性气体可以添加到产生蚀刻剂的气体组合中。 CF4 / HBr / O2的组合已被证明是有效的。 通过这种等离子体源气体的组合，通常通过使用C 2 H 4 F 5 :H 2 O的体积比约2:1至约5:1的体积比来改善基底表面上的临界尺寸（CD）均匀性控制，其范围为约 优选3:1至约4:1。 增加的等离子体密度也有助于改善CD均匀性控制。 （C x H y F z + HBr）：O 2的体积比应在约1:1至5:1之间，优选约2:1至约3:1的范围。

公开(公告)号：US09533332B2

公开(公告)日：2017-01-03

申请号：US13614365

申请日：2012-09-13

申请人： Noel Sun ,  Meihua Shen ,  Nicolas Gani ,  Chung Nang Liu ,  Radhika C. Mani

发明人： Noel Sun ,  Meihua Shen ,  Nicolas Gani ,  Chung Nang Liu ,  Radhika C. Mani

IPC分类号： B08B5/00 ,  B08B7/00 ,  B08B9/08 ,  C23C16/44 ,  H01J37/32

CPC分类号： B08B5/00 ,  B08B7/0035 ,  C23C16/4405 ,  H01J37/32449 ,  H01J37/32862 ,  Y10S438/905

摘要： Embodiments of the invention include methods for in-situ chamber dry cleaning a plasma processing chamber utilized for gate structure fabrication process in semiconductor devices. In one embodiment, a method for in-situ chamber dry clean includes supplying a first cleaning gas including at least a boron containing gas into a processing chamber in absence of a substrate disposed therein, supplying a second cleaning gas including at least a halogen containing gas into the processing chamber in absence of the substrate, and supplying a third cleaning gas including at least an oxygen containing gas into the processing chamber in absence of the substrate.

摘要翻译： 本发明的实施例包括用于半导体器件中用于栅极结构制造工艺的等离子体处理室的原位室干洗的方法。 在一个实施例中，一种用于原位室干洗的方法包括在不存在设置在其中的基板的情况下将包括至少含硼气体的第一清洁气体供应到处理室中，提供至少包含含卤素气体的第二清洁气体 在没有基板的情况下进入处理室，并且在没有基板的情况下将至少包含含氧气体的第三清洁气体供应到处理室中。

公开(公告)号：US20100210112A1

公开(公告)日：2010-08-19

申请号：US12371085

申请日：2009-02-13

申请人： Meihua Shen ,  Noel Sun ,  Nicolas Gani ,  Han-Hsiang Chen ,  Eric Pei ,  Weimin Zeng ,  Thorsten B. Lill ,  Uday Mitra ,  Ellie Y. Yieh

发明人： Meihua Shen ,  Noel Sun ,  Nicolas Gani ,  Han-Hsiang Chen ,  Eric Pei ,  Weimin Zeng ,  Thorsten B. Lill ,  Uday Mitra ,  Ellie Y. Yieh

IPC分类号： H01L21/3065

CPC分类号： H01L21/31122 ,  H01L21/28123 ,  H01L21/28167 ,  H01L21/31105 ,  H01L21/31111 ,  H01L21/32139 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517

摘要： Methods for fabricating a semiconductor device having a lanthanum-family-based oxide layer are described. A gate stack having a lanthanum-family-based oxide layer is provided above a substrate. At least a portion of the lanthanum-family-based oxide layer is modified to form a lanthanum-family-based halide portion. The lanthanum-family-based halide portion is removed with a water vapor treatment.

摘要翻译： 描述了制造具有镧族氧化物层的半导体器件的方法。 具有镧族氧化物层的栅极叠层设置在基板的上方。 镧族氧化物层的至少一部分被改性以形成镧族卤化物部分。 用水蒸气处理除去镧族卤化物部分。