公开(公告)号：US5750012A

公开(公告)日：1998-05-12

申请号：US627262

申请日：1996-04-04

申请人： P. J. Ireland ,  Howard Rhodes ,  Sujit Sharan ,  Sukesh Sandhu ,  Tim O'Brien ,  Tim Johnson

发明人： P. J. Ireland ,  Howard Rhodes ,  Sujit Sharan ,  Sukesh Sandhu ,  Tim O'Brien ,  Tim Johnson

IPC分类号： C23C14/04 ,  C23C14/35 ,  H01L21/762 ,  H01L21/768 ,  C23C14/34

CPC分类号： C23C14/35 ,  C23C14/046 ,  H01L21/762 ,  H01L21/76877

摘要： An improved sputtering process increases the perpendicularity of the sputtered flux to the target surface by bombarding the target with both low and high mass ions, with low mass ions predominating, packing the target with both low and high mass implanted ions, and causing target atoms ejected as a result of high mass incident ions to have a higher probability of perpendicular or near perpendicular ejection. An alternative improved sputtering process bombards the target with both low and high mass ions, with high mass ions predominating, resulting in a higher sputter rate than achievable with either the high or low mass species alone. Including in either process as the high or the low mass species a species having a lower ionization energy than a standard species allows a reduced pressure plasma, resulting in less scattering of the sputtered flux. A low ionization energy species may also be employed to assist in striking a plasma before sputtering by a single species during deposition.

公开(公告)号：US06398923B1

公开(公告)日：2002-06-04

申请号：US09609441

申请日：2000-07-03

申请人： P. J. Ireland ,  Howard Rhodes ,  Sujit Sharan ,  Sukesh Sandhu ,  Tim O'Brien ,  Tim Johnson

发明人： P. J. Ireland ,  Howard Rhodes ,  Sujit Sharan ,  Sukesh Sandhu ,  Tim O'Brien ,  Tim Johnson

IPC分类号： C23C1434

CPC分类号： C23C14/35 ,  C23C14/046 ,  H01L21/762 ,  H01L21/76877

摘要： An improved sputtering process increases the perpendicularity of the sputtered flux to the target surface by bombarding the target with both low and high mass ions, with low mass ions predominating, packing the target with both low and high mass implanted ions, and causing target atoms ejected as a result of high mass incident ions to have a higher probability of perpendicular or near perpendicular ejection. An alternative improved sputtering process bombards the target with both low and high mass ions, with high mass ions predominating, resulting in a higher sputter rate than achievable with either the high or low mass species alone. Including in either process as the high or the low mass species a species having a lower ionization energy than a standard species allows a reduced pressure plasma, resulting in less scattering of the sputtered flux. A low ionization energy species may also be employed to assist in striking a plasma before sputtering by a single species during deposition.

摘要翻译： 改进的溅射工艺通过以低质量离子和高质量离子轰击靶，通过以低质量离子为主来增加溅射通量对目标表面的垂直度，用低质量和高质量注入离子填充目标，并引起目标原子喷出 作为高质量入射离子的结果具有更高的垂直或近似垂直喷射的概率。 一种替代的改进的溅射工艺用低和高质量离子轰击靶，以高质量离子为主，导致比单独使用高质量或低质量物质可实现的更高的溅射速率。 在任一过程中，作为高质量或低质量物质，具有比标准物质更低的电离能的物质允许减压等离子体，导致溅射通量的较少散射。 也可以使用低电离能种来在沉积期间通过单一物质在溅射之前帮助击打等离子体。

公开(公告)号：US6083358A

公开(公告)日：2000-07-04

申请号：US53354

申请日：1998-04-01

申请人： P. J. Ireland ,  Howard Rhodes ,  Sujit Sharan ,  Sukesh Sandhu ,  Tim O'Brien ,  Tim Johnson

发明人： P. J. Ireland ,  Howard Rhodes ,  Sujit Sharan ,  Sukesh Sandhu ,  Tim O'Brien ,  Tim Johnson

IPC分类号： C23C14/04 ,  C23C14/35 ,  H01L21/762 ,  H01L21/768 ,  C23C14/34

CPC分类号： C23C14/35 ,  C23C14/046 ,  H01L21/762 ,  H01L21/76877

摘要： An improved sputtering process increases the perpendicularity of the sputtered flux to the target surface by bombarding the target with both low and high mass ions, with low mass ions predominating, packing the target with both low and high mass implanted ions, and causing target atoms ejected as a result of high mass incident ions to have a higher probability of perpendicular or near perpendicular ejection. An alternative improved sputtering process bombards the target with both low and high mass ions, with high mass ions predominating, resulting in a higher sputter rate than achievable with either the high or low mass species alone. Including in either process as the high or the low mass species a species having a lower ionization energy than a standard species allows a reduced pressure plasma, resulting in less scattering of the sputtered flux. A low ionization energy species may also be employed to assist in striking a plasma before sputtering by a single species during deposition.

摘要翻译： 改进的溅射工艺通过以低质量离子和高质量离子轰击靶，通过以低质量离子为主来增加溅射通量对目标表面的垂直度，用低质量和高质量注入离子填充目标，并引起目标原子喷出 作为高质量入射离子的结果具有更高的垂直或近似垂直喷射的概率。 一种替代的改进的溅射工艺用低和高质量离子轰击靶，以高质量离子为主，导致比单独使用高质量或低质量物质可实现的更高的溅射速率。 在任一过程中，作为高质量或低质量物质，具有比标准物质更低的电离能的物质允许减压等离子体，导致溅射通量的较少散射。 也可以使用低电离能种来在沉积期间通过单一物质在溅射之前帮助击打等离子体。

公开(公告)号：US08269306B2

公开(公告)日：2012-09-18

申请号：US12901825

申请日：2010-10-11

申请人： Sukesh Sandhu

发明人： Sukesh Sandhu

IPC分类号： H01L21/70

CPC分类号： H01L27/11526 ,  H01L21/76229 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/11531

摘要： A dielectric liner is formed in first and second trenches respectively in first and second portions of a substrate. A layer of material is formed overlying the dielectric liner so as to substantially concurrently substantially fill the first trench and partially fill the second trench. The layer of material is removed substantially concurrently from the first and second trenches to expose substantially all of the dielectric liner within the second trench and to form a plug of the material in the one or more first trenches. A second layer of dielectric material is formed substantially concurrently on the plug in the first trench and on the exposed portion of the dielectric liner in the second trench. The second layer of dielectric material substantially fills a portion of the first trench above the plug and the second trench.

摘要翻译： 分别在基板的第一和第二部分中的第一和第二沟槽中形成电介质衬垫。 一层材料形成在电介质衬垫上方，以便基本上同时基本上填充第一沟槽并部分地填充第二沟槽。 基本上同时从第一和第二沟槽去除材料层，以暴露第二沟槽内的基本上所有的电介质衬垫，并在一个或多个第一沟槽中形成材料的插塞。 第二层电介质材料基本上同时形成在第一沟槽中的插塞上和在第二沟槽中的电介质衬垫的暴露部分上。 所述第二介电材料层基本上填充所述第一沟槽在所述插头和所述第二沟槽上方的一部分。

公开(公告)号：US07935610B2

公开(公告)日：2011-05-03

申请号：US11604958

申请日：2006-11-28

申请人： Sukesh Sandhu

发明人： Sukesh Sandhu

IPC分类号： H01L21/76

CPC分类号： H01L29/0649 ,  H01L21/76229 ,  H01L21/76232

摘要： Structures and methods are disclosed for the electrical isolation of semiconductor devices. A method of forming a semiconductor device may include providing a second integrated device region on a substrate that is spaced apart from a first integrated device region. An isolation region may be interposed between the first integrated device region and the second integrated device region. The isolation region may include an isolation recess that projects into the substrate to a first predetermined depth, and that may be extended to a second predetermined depth.

摘要翻译： 公开了用于半导体器件的电隔离的结构和方法。 形成半导体器件的方法可以包括在与第一集成器件区域间隔开的衬底上提供第二集成器件区域。 可以在第一集成器件区域和第二集成器件区域之间插入隔离区域。 隔离区域可以包括隔离凹槽，该隔离凹槽突出到基板中到达第一预定深度，并且可以将隔离凹槽延伸到第二预定深度。

公开(公告)号：US07396720B2

公开(公告)日：2008-07-08

申请号：US10899913

申请日：2004-07-27

申请人： Sukesh Sandhu ,  Gurtej S. Sandhu

发明人： Sukesh Sandhu ,  Gurtej S. Sandhu

IPC分类号： H01L21/336

CPC分类号： H01L27/11521 ,  H01L27/115 ,  H01L29/42324 ,  H01L29/7881

摘要： A first dielectric layer is formed over a substrate. A single layer first conductive layer that acts as a floating gate is formed over the first dielectric layer. A trough is formed in the first conductive layer to increase the capacitive coupling of the floating gate with a control gate. An intergate dielectric layer is formed over the floating gate layer. A second conductive layer is formed over the second dielectric layer to act as a control gate.

摘要翻译： 第一电介质层形成在衬底上。 用作浮栅的单层第一导电层形成在第一介电层上。 在第一导电层中形成槽，以增加浮栅与控制栅的电容耦合。 在浮栅层上形成隔间介电层。 在第二介电层上形成第二导电层以用作控制栅极。

公开(公告)号：US20070243692A1

公开(公告)日：2007-10-18

申请号：US11405629

申请日：2006-04-18

申请人： Paul Rudeck ,  Sukesh Sandhu

发明人： Paul Rudeck ,  Sukesh Sandhu

IPC分类号： H01L21/76

CPC分类号： H01L21/76232

摘要： The invention relates to a method and resulting structure that can substantially minimize and/or eliminate void formation during an isolation trench isolation fill process for typical trench shaped and goal-post shaped isolation regions. First, a thin thermal oxidation layer is grown on the sidewall of each trench and then a layer of polysilicon is deposited above the oxidation layer and oxidized. In one embodiment, a repeating series of polysilicon deposition and polysilicon oxidation steps are performed until each trench has been completely filled. In another embodiment, within a goal-post shaped trench having a wider upper portion and a narrower lower portion, the remainder of the upper wider trench portion is filled using a conventional high density plasma technique.

摘要翻译： 本发明涉及一种在典型的沟槽形状和球柱形隔离区域的隔离沟槽隔离填充过程中基本上最小化和/或消除空隙形成的方法和结果。 首先，在每个沟槽的侧壁上生长薄的热氧化层，然后在氧化层上方沉积一层多晶硅并被氧化。 在一个实施例中，执行重复的多晶硅沉积和多晶硅氧化步骤，直到每个沟槽已经被完全填充。 在另一个实施例中，在具有较宽上部和较窄下部的球柱形沟槽内，使用常规高密度等离子体技术填充上部较宽沟槽部分的其余部分。

公开(公告)号：US20070210390A1

公开(公告)日：2007-09-13

申请号：US11714220

申请日：2007-03-06

申请人： Sukesh Sandhu ,  Gurtej Sandhu

发明人： Sukesh Sandhu ,  Gurtej Sandhu

IPC分类号： H01L29/76

CPC分类号： H01L21/76232 ,  H01L21/76229

摘要： A method of forming and resulting isolation region, which allows for densification of an oxide layer in the isolation region. One exemplary embodiment of the method includes the steps of forming a first trench, forming an oxide layer on the bottom and sidewalls of the trench, forming nitride spacers on the lined trench, and thereafter etching the silicon beneath the first trench to form a second trench area. An oxide layer is then deposited to fill the second trench. Densificiation of the isolation region is possible because the silicon is covered with nitride, and therefore will not be oxidized. Light etches are then performed to etch the oxide and nitride spacer area in the first trench region. A conventional oxide fill process can then be implemented to complete the isolation region.

摘要翻译： 形成和产生的隔离区域的方法，其允许隔离区域中的氧化物层致密化。 该方法的一个示例性实施例包括以下步骤：形成第一沟槽，在沟槽的底部和侧壁上形成氧化物层，在衬里的沟槽上形成氮化物间隔物，之后蚀刻第一沟槽下方的硅以形成第二沟槽 区。 然后沉积氧化物层以填充第二沟槽。 隔离区的密集是可能的，因为硅被氮化物覆盖，因此不会被氧化。 然后进行光蚀刻以蚀刻第一沟槽区域中的氧化物和氮化物间隔物区域。 然后可以实现常规氧化物填充过程以完成隔离区域。

公开(公告)号：US20070194402A1

公开(公告)日：2007-08-23

申请号：US11358267

申请日：2006-02-21

申请人： Sukesh Sandhu ,  Xiaolong Fang

发明人： Sukesh Sandhu ,  Xiaolong Fang

IPC分类号： H01L29/00

CPC分类号： H01L21/76232 ,  H01L27/1052 ,  H01L27/115

摘要： Structures, methods, devices, and systems are provided, including shallow trench isolation structures. In particular, a semiconductor device including a substrate and a shallow trench isolation structure on the substrate. The shallow trench isolation structure includes a first isolation trench portion and a second isolation trench portion. The first isolation trench portion has a first sidewall that is perpendicular or nearly perpendicular to the surface of the substrate, while the second isolation trench portion has a second sidewall that is angled obliquely with respect to the surface of the substrate. The second isolation trench portion is formed such that it has a smaller volume than the first isolation trench portion.

摘要翻译： 提供了结构，方法，装置和系统，包括浅沟槽隔离结构。 特别地，在衬底上包括衬底和浅沟槽隔离结构的半导体器件。 浅沟槽隔离结构包括第一隔离沟槽部分和第二隔离沟槽部分。 第一隔离沟槽部分具有垂直于或几乎垂直于衬底表面的第一侧壁，而第二隔离沟槽部分具有相对于衬底表面倾斜成角度的第二侧壁。 第二隔离沟槽部分形成为具有比第一隔离沟槽部分更小的体积。

公开(公告)号：US20060211201A1

公开(公告)日：2006-09-21

申请号：US11440351

申请日：2006-05-24

申请人： Sukesh Sandhu ,  Gurtej Sandhu

发明人： Sukesh Sandhu ,  Gurtej Sandhu

IPC分类号： H01L21/336

CPC分类号： H01L27/11521 ,  H01L27/115 ,  H01L29/42324 ,  H01L29/7881

摘要： A first dielectric layer is formed over a substrate. A single layer first conductive layer that acts as a floating gate is formed over the first dielectric layer. A trough is formed in the first conductive layer to increase the capacitive coupling of the floating gate with a control gate. An intergate dielectric layer is formed over the floating gate layer. A second conductive layer is formed over the second dielectric layer to act as a control gate.