公开(公告)号：US20130140696A1

公开(公告)日：2013-06-06

申请号：US13759833

申请日：2013-02-05

申请人： PANASONIC CORPORATION

发明人： Nobuo AOI

IPC分类号： H01L23/498

CPC分类号： H01L23/49811 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0345 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05023 ,  H01L2224/05147 ,  H01L2224/05568 ,  H01L2224/05647 ,  H01L2224/10145 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11622 ,  H01L2224/11827 ,  H01L2224/11831 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13124 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13565 ,  H01L2224/1357 ,  H01L2224/13686 ,  H01L2224/1601 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/81937 ,  H01L2924/00014 ,  H01L2924/3841 ,  H01L2924/05442 ,  H01L2224/05552

摘要： A semiconductor device includes a first substrate; a plurality of first electrodes formed on the first substrate; and a first insulating film formed on sidewalls of the plurality of first electrodes. The first insulating film is formed not to fill spaces between the plurality of first electrodes.

摘要翻译： 半导体器件包括第一衬底; 形成在所述第一基板上的多个第一电极; 以及形成在所述多个第一电极的侧壁上的第一绝缘膜。 第一绝缘膜形成为不填充多个第一电极之间的空间。

公开(公告)号：US20130140680A1

公开(公告)日：2013-06-06

申请号：US13756100

申请日：2013-01-31

申请人： PANASONIC CORPORATION

发明人： Yoshinao HARADA ,  Nobuo AOI

IPC分类号： H01L23/48

CPC分类号： H01L23/481 ,  H01L21/7682 ,  H01L21/76898 ,  H01L29/78 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/06181 ,  H01L2224/13025 ,  H01L2924/13091 ,  H01L2924/00

摘要： A semiconductor device includes: an active region located in an upper portion of a semiconductor substrate; a through-hole electrode penetrating the substrate, and made of a conductor having a thermal expansion coefficient larger than that of a material for the substrate; and a stress buffer region located in the upper portion of the substrate and sandwiched between the through-hole electrode and the active region. The stress buffer region does not penetrate the substrate and includes a stress buffer part made of a material having a thermal expansion coefficient larger than that of the material for the substrate and an untreated region where the stress buffer part is not present. The stress buffer part is located in at least two locations sandwiching the untreated region in a cross section perpendicular to a surface of the substrate and passing through the through-hole electrode and the active region.

摘要翻译： 半导体器件包括：位于半导体衬底的上部的有源区; 穿透基板的通孔电极，其热膨胀系数大于基板材料的导热系数; 以及位于基板的上部并夹在通孔电极和有源区之间的应力缓冲区。 应力缓冲区域不穿透衬底并且包括由热膨胀系数大于衬底材料的材料制成的应力缓冲部分和不存在应力缓冲部分的未处理区域。 应力缓冲部位于与基板的表面垂直的截面中夹持未处理区域的至少两个位置，并通过通孔电极和有源区域。