Abstract:
A solid-state imaging device includes: a pixel array unit in which a plurality of pixels are arranged in rows and columns; a plurality of column signal lines which are provided in one-to-one correspondence with pixel columns; a column processor including a plurality of column AD circuits provided in one-to-one correspondence with the plurality of column signal lines; a power supply variation detector which is connected to a power supply wire through which a power supply voltage is transmitted to each of the pixels, and which detects, in correspondence with pixel rows, power supply variation components attributed to variations in the power supply voltage; and a power supply variation corrector which corrects, for each of the pixel rows, a pixel signal detected by the column processor, using the power supply variation components detected by the power supply variation detector.
Abstract:
A solid-state imaging device includes: a pixel including a photoelectric converter that generates a charge and a charge accumulator that converts the charge into a voltage; a controller that causes the pixel to perform exposure in a first exposure mode and convert the charge into the voltage with a first gain to output a first pixel signal, and causes the pixel to perform exposure in a second exposure mode and convert the charge into the voltage with a second gain to output a second pixel signal, the second exposure mode being shorter in exposure time than the first exposure mode, and the second gain being lower than the first gain; and a signal processor that synthesizes the second pixel signal after amplification and the first pixel signal.
Abstract:
A solid-state imaging device includes: a plurality of unit cells each including at least one light receiving unit and an amplifying transistor which outputs an amplified signal corresponding to an amount of the signal charge photoelectrically converted by the light receiving unit; a plurality of vertical signal lines each for receiving an output signal from the amplifying transistor; a pixel power supply line for supplying a power supply voltage to the amplifying transistor; a plurality of constant current source transistors each connected to a different one of the vertical signal lines; and a bias circuit which controls an amount of current to be supplied to each of the constant current source transistors, based on a variation in the power supply voltage.
Abstract:
A solid-state imaging apparatus includes a plurality of high-sensitivity pixels that are arranged in a matrix, and perform a photoelectric conversion at a predetermined sensitivity; a plurality of low-sensitivity pixels that are arranged in a matrix in gaps between the plurality of high-sensitivity pixels, and perform a photoelectric conversion at a lower sensitivity than the predetermined sensitivity; and a signal processor that generates a pixel signal by (i) detecting a difference signal between a signal from the plurality of high-sensitivity pixels and a signal from the plurality of low-sensitivity pixels, and (ii) correcting the signal from the plurality of high-sensitivity pixels using the difference signal.
Abstract:
An imaging device includes: a semiconductor substrate; a first photoelectric converter which is disposed in the semiconductor substrate; a second photoelectric converter different from the first photoelectric converter, which is disposed in the semiconductor substrate; a wiring layer disposed on or above the semiconductor substrate; and a capacitor which is disposed in the wiring layer and surrounds the first photoelectric converter in plan view. The capacitor includes a first electrode, a second electrode, and a dielectric layer disposed between the first electrode and the second electrode. The first electrode is connected to one of the first photoelectric converter and the second photoelectric converter.
Abstract:
A solid-state imaging apparatus includes a plurality of pixel cells arranged in a pixel array unit, a vertical signal line and a pixel power supply line each connected to a source electrode and a drain electrode of an amplifying transistor, a Pch transistor for supplying potential AVDD to the vertical signal line, a Pch transistor for supplying potential PBIAS_H higher than the potential AVDD to the vertical signal line, a Pch transistor for supplying the potential PBIAS_H to the pixel power supply line, wherein while the transfer transistor is turned ON and transfers signal charges photoelectrically converted by a photodiode to the floating diffusion portion, the Pch transistors are turned ON and the potential PBIAS_H is applied to the vertical signal line and the pixel power supply line.