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公开(公告)号:US20180376081A1
公开(公告)日:2018-12-27
申请号:US16059517
申请日:2018-08-09
Inventor: Makoto IKUMA , Takahiro MUROSHIMA , Takayasu KITO , Hiroyuki AMIKAWA , Tetsuya ABE
IPC: H04N5/345 , H04N5/3745 , H04N5/369
CPC classification number: H04N5/345 , H01L27/146 , H03M1/0845 , H03M1/123 , H03M1/56 , H04N5/357 , H04N5/3698 , H04N5/3745 , H04N5/378
Abstract: A solid-state imaging device includes: a pixel array unit in which a plurality of pixels are arranged in rows and columns; a plurality of column signal lines which are provided in one-to-one correspondence with pixel columns; a column processor including a plurality of column AD circuits provided in one-to-one correspondence with the plurality of column signal lines; a power supply variation detector which is connected to a power supply wire through which a power supply voltage is transmitted to each of the pixels, and which detects, in correspondence with pixel rows, power supply variation components attributed to variations in the power supply voltage; and a power supply variation corrector which corrects, for each of the pixel rows, a pixel signal detected by the column processor, using the power supply variation components detected by the power supply variation detector.
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公开(公告)号:US20190289238A1
公开(公告)日:2019-09-19
申请号:US16431302
申请日:2019-06-04
Inventor: Makoto IKUMA , Hiroyuki Amikawa , Takayasu Kito , Shinichi Ogita , Junichi Matsuo , Yasuyuki Endoh , Katsumi Tokuyama , Tetsuya Abe
Abstract: A solid-state imaging apparatus includes a pixel array, a column processor, and a test signal generating circuit that generates a first digital signal for testing purposes. The test signal generating circuit generates the first digital signal within one horizontal scanning period. The column processor converts a first analog signal, that is converted from the first digital signal, to a second digital signal within the one horizontal scanning period.
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公开(公告)号:US20180376083A1
公开(公告)日:2018-12-27
申请号:US16059485
申请日:2018-08-09
Inventor: Makoto IKUMA , Takahiro MUROSHIMA , Takayasu KITO , Hiroyuki AMIKAWA , Tetsuya ABE
CPC classification number: H04N5/359 , G02B26/10 , H04N5/23229 , H04N5/35563 , H04N5/35581 , H04N5/3559 , H04N5/378
Abstract: A solid-state imaging device includes: a pixel including a photoelectric converter that generates a charge and a charge accumulator that converts the charge into a voltage; a controller that causes the pixel to perform exposure in a first exposure mode and convert the charge into the voltage with a first gain to output a first pixel signal, and causes the pixel to perform exposure in a second exposure mode and convert the charge into the voltage with a second gain to output a second pixel signal, the second exposure mode being shorter in exposure time than the first exposure mode, and the second gain being lower than the first gain; and a signal processor that synthesizes the second pixel signal after amplification and the first pixel signal.
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公开(公告)号:US20170302869A1
公开(公告)日:2017-10-19
申请号:US15636088
申请日:2017-06-28
Inventor: Makoto IKUMA , Manabu TSUNODA , Kenji WATANABE , Kenichi HAGA , Masaru KATO
CPC classification number: H04N5/365 , H04N5/3658 , H04N5/374 , H04N5/378
Abstract: A solid-state imaging device includes: a pixel array including a plurality of pixel circuits arranged in rows and columns; a vertical signal line that is provided for each of the columns and transmits pixel signals; a column AD circuit that is provided for each of the columns and AD converts the pixel signals from the vertical signal line; a column-switching circuit that is interposed in the vertical signal line between the pixel array and the column AD circuit and switches connection between the vertical signal line and the column AD circuit; a controller that causes the column-switching circuit to switch the connection for every horizontal scan period; and a restoration circuit that restores ordering of the AD converted signals so as to correspond to ordering in which the vertical signal lines are arranged in the pixel array.
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公开(公告)号:US20170302870A1
公开(公告)日:2017-10-19
申请号:US15636165
申请日:2017-06-28
Inventor: Makoto IKUMA , Masaru KATO
IPC: H04N5/365 , H04N5/3745 , H04N5/357
CPC classification number: H04N5/3658 , H04N5/357 , H04N5/3577 , H04N5/3698 , H04N5/37457 , H04N5/378
Abstract: A solid-state imaging device includes: a plurality of pixel circuits arranged in rows and columns; a plurality of unit power supply circuits that generate a second power supply voltage from a first power supply voltage based on a reference voltage and supply the second power supply voltage to amplifier transistors provided in the plurality of pixel circuits; and a regulator circuit that generates the reference voltage that is constant. Each of the unit power supply circuits is provided for a corresponding one of the columns of the plurality of pixel circuits or for a corresponding one of the pixel circuits, and supplies the second power supply voltage to the amplifier transistors in the pixel circuits that belong to the corresponding one of the columns or to the amplifier transistor in the corresponding one of the pixel circuits.
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公开(公告)号:US20150076325A1
公开(公告)日:2015-03-19
申请号:US14552446
申请日:2014-11-24
Inventor: Masahiro HIGUCHI , Hiroshi FUJINAKA , Makoto IKUMA
IPC: H03K4/90 , H01L27/146
CPC classification number: H03K4/90 , H01L27/14645 , H03K4/08 , H04N5/357 , H04N5/378
Abstract: A ramp generator circuit includes: a reference signal generator circuit which generates a ramp waveform having a slope obtained by multiplication using a power of 2 according to a value of a higher order bit of a gain control signal; a clock control circuit which selectively outputs 2̂m kinds of fractional-N clocks according to one of 2̂m (natural number) areas obtained by dividing a code range represented by a lower order bit, when a negative gain is set; and a variable gain circuit which sets a ramp waveform according to the value of the gain control signal, and sets a ramp signal amplitude in each area so that a period ratio between ramp driving clocks for adjacent areas and a ratio between an amplitude of a ramp signal when the standard gain is set and a largest amplitude of a ramp signal are equal.
Abstract translation: 斜坡发生器电路包括:参考信号发生器电路,其产生具有根据增益控制信号的较高阶位的值使用2的幂乘以获得的斜率的斜坡波形; 时钟控制电路,当设置负增益时,根据通过划分由低位位表示的代码范围获得的2m(自然数)区域中的一个选择性地输出2m种分数N个时钟; 以及可变增益电路,其根据增益控制信号的值设定斜坡波形,并且设置每个区域中的斜坡信号振幅,使得相邻区域的斜坡驱动时钟之间的周期比和斜坡幅度之间的比率 当标准增益被设置并且斜坡信号的最大振幅相等时发出信号。
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公开(公告)号:US20190288020A1
公开(公告)日:2019-09-19
申请号:US16431277
申请日:2019-06-04
Inventor: Makoto IKUMA , Hiroyuki AMIKAWA , Takayasu KITO , Shinichi OGITA , Junichi MATSUO , Yasuyuki ENDOH , Katsumi TOKUYAMA , Tetsuya ABE
IPC: H01L27/146 , H01L27/142 , H04N5/235 , H04N5/232 , H04N5/225
Abstract: A solid-state imaging apparatus includes a plurality of high-sensitivity pixels that are arranged in a matrix, and perform a photoelectric conversion at a predetermined sensitivity; a plurality of low-sensitivity pixels that are arranged in a matrix in gaps between the plurality of high-sensitivity pixels, and perform a photoelectric conversion at a lower sensitivity than the predetermined sensitivity; and a signal processor that generates a pixel signal by (i) detecting a difference signal between a signal from the plurality of high-sensitivity pixels and a signal from the plurality of low-sensitivity pixels, and (ii) correcting the signal from the plurality of high-sensitivity pixels using the difference signal.
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