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    IMAGING DEVICE
    2.
    发明申请
    IMAGING DEVICE 有权

    公开(公告)号：US20210273012A1

    公开(公告)日：2021-09-02

    申请号：US17324622

    申请日：2021-05-19

    Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD

    Inventor： Hidenari KANEHARA ,  Yusuke OKADA ,  Sanshiro SHISHIDO ,  Kazuko NISHIMURA

    IPC: H01L27/146

    Abstract: An imaging device including: a first pixel and a second pixel that are arranged along a first direction, the first pixel and the second pixel each including a photoelectric converter that converts light into a charge, a charge accumulator that accumulates the charge, and a first transistor one of a source and a drain of which is connected to the charge accumulator; a first line and a second line that each extend along the first direction; first voltage supply circuitry that is connected to the first transistor of the first pixel through the first line; and second voltage supply circuitry that is connected to the first transistor of the second pixel through the second line.

    IMAGING DEVICE INCLUDING PHOTOELECTRIC CONVERTERS AND CAPACITIVE ELEMENT
    4.
    发明申请
    IMAGING DEVICE INCLUDING PHOTOELECTRIC CONVERTERS AND CAPACITIVE ELEMENT 有权

    公开(公告)号：US20230097274A1

    公开(公告)日：2023-03-30

    申请号：US18077127

    申请日：2022-12-07

    Applicant: Panasonic Intellectual Property Management Co., Ltd

    Inventor： Sanshiro SHISHIDO ,  Masashi MURAKAMI ,  Kazuko NISHIMURA

    IPC: H01L27/146 ,  H04N5/355 ,  H04N5/374 ,  H04N5/378 ,  H04N5/225

    Abstract: An imaging device that includes a semiconductor substrate; a first photoelectric converter that is located in the semiconductor substrate and that generates a first signal charge by photoelectric conversion; a first node to which the first signal charge is input; a capacitor having a first terminal coupled to the first node; a second photoelectric converter that is located in the semiconductor substrate and that generates a second signal charge by photoelectric conversion; a second node to which the second signal charge is input; a transistor having a gate coupled to the second node; and a switch element coupled between the first node and the second node, where a number of saturation charges of a first imaging cell including the first photoelectric converter and the capacitor is greater than a number of saturation charges of a second imaging cell including the second photoelectric converter.

    IMAGING DEVICE
    5.
    发明申请
    IMAGING DEVICE 审中-公开

    公开(公告)号：US20190313040A1

    公开(公告)日：2019-10-10

    申请号：US16447148

    申请日：2019-06-20

    Applicant: Panasonic Intellectual Property Management Co., Ltd.

    Inventor： Kazuko NISHIMURA ,  Tokuhiko TAMAKI ,  Masashi MURAKAMI

    IPC: H04N5/369 ,  H04N5/378 ,  H01L27/146 ,  H04N5/363 ,  H04N5/3745 ,  H04N5/359

    Abstract: An imaging device comprising: a first pixel cell including a first photoelectric converter generating a first signal, the first photoelectric converter including a first electrode and a first photoelectric conversion region on the first electrode, and a first circuit coupled to the first electrode and detecting the first signal; and a second pixel cell including a second photoelectric converter generating a second signal, the second photoelectric converter including a second electrode and a second photoelectric conversion region on the second electrode, and a second circuit coupled to the second electrode and detecting the second signal. A sensitivity of the first pixel cell is higher than that of the second pixel cell. A circuit configuration of the first circuit is different from that of the second circuit. The first circuit includes a feedback circuit configured to negatively feed back a voltage of the first electrode to the first electrode.

    SOLID-STATE IMAGING DEVICE AND IMAGING APPARATUS
    6.
    发明申请
    SOLID-STATE IMAGING DEVICE AND IMAGING APPARATUS 有权
    固态成像装置和成像装置

    公开(公告)号：US20150163436A1

    公开(公告)日：2015-06-11

    申请号：US14626261

    申请日：2015-02-19

    Applicant: Panasonic Intellectual Property Management Co., Ltd.

    Inventor： Katsumasa HIJIKATA ,  Kazuko NISHIMURA ,  Yutaka ABE

    IPC: H04N5/378 ,  H04N5/374

    CPC classification number: H04N5/378 ,  H04N5/374 ,  H04N5/3745

    Abstract: A solid-state imaging device includes: a pixel unit which includes a plurality of pixels arranged in rows and columns and which generates pixel signals according to an amount of incident light; a column analog-to-digital converter (ADC) which is disposed for each of the columns of the pixel unit and which performs digital conversion on each of the pixel signals output from the pixels in the column; a timing control unit which generates a control signal for controlling the digital conversion performed by the column ADC; and a logic swing and delay adjusting circuit which is disposed in a signal path for supplying the control signal from the timing control unit to the column ADC and which at least either reduces an amplitude of the control signal or delays the control signal.

    Abstract translation: 固态成像装置包括：像素单元，其包括以行和列排列的多个像素，并且根据入射光的量生成像素信号; 列模拟数字转换器（ADC），其被设置用于像素单元的每个列，并对从列中的像素输出的每个像素信号执行数字转换; 定时控制单元，其生成用于控制由列ADC执行的数字转换的控制信号; 以及逻辑摆幅和延迟调整电路，其布置在用于将控制信号从定时控制单元提供给列ADC的信号路径中，并且至少降低控制信号的幅度或延迟控制信号。

    IMAGING APPARATUS
    9.
    发明申请
    IMAGING APPARATUS 有权

    公开(公告)号：US20220208816A1

    公开(公告)日：2022-06-30

    申请号：US17695422

    申请日：2022-03-15

    Applicant: Panasonic Intellectual Property Management Co., Ltd.

    Inventor： Junji HIRASE ,  Masaaki YANAGIDA ,  Kazuko NISHIMURA ,  Yoshinori TAKAMI

    IPC: H01L27/146

    Abstract: An imaging apparatus comprises a semiconductor substrate, a photoelectric converter, a charge storage region, and an amplification transistor. The photoelectric converter includes a pixel electrode, a counter electrode, and a photoelectric conversion layer. The photoelectric conversion layer is positioned above the semiconductor substrate and is disposed between the pixel electrode and the counter electrode. Charge generated by the photoelectric converter is stored in the charge storage region. The amplification transistor includes a source, a drain, and a gate electrode. The gate electrode is electrically connected to the charge storage region. In a plan view, the width of the drain of the amplification transistor is less than the width of the source of the amplification transistor.

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