公开(公告)号：US20240153762A1

公开(公告)日：2024-05-09

申请号：US18283728

申请日：2022-03-11

申请人： Paragraf Limited

发明人： Sebastian DIXON ,  Jaspreet KAINTH ,  Robert JAGT

IPC分类号： H01L21/02

CPC分类号： H01L21/02527 ,  H01L21/02008 ,  H01L21/02189 ,  H01L21/02205 ,  H01L21/0228 ,  H01L21/02488 ,  H01L21/02502

摘要： A wafer for the CVD growth of uniform graphene and method of manufacture thereof There is provided a wafer for the CVD growth of uniform graphene at a temperature in excess of 700° C., the wafer comprising in order: a planar silicon substrate, an insulating layer provided across the silicon substrate, and a barrier layer provided across the insulating layer, wherein the insulating layer is a silicon nitride and/or aluminium nitride layer, and wherein the barrier layer has a constant thickness of 50 nm or less and provides a growth surface for the CVD growth of uniform graphene.

公开(公告)号：US20240128079A1

公开(公告)日：2024-04-18

申请号：US18277360

申请日：2022-02-15

申请人： Paragraf Limited

发明人： Ivor GUINEY ,  Sebastian DIXON ,  Jaspreet KAINTH ,  Thomas James BADCOCK ,  Ross Matthew GRIFFIN

IPC分类号： H01L21/02 ,  H01L29/16

CPC分类号： H01L21/02527 ,  H01L21/02381 ,  H01L21/02488 ,  H01L29/1606

摘要： A method for the manufacture of an improved graphene substrate and applications therefor There is provided a method (100) for the manufacture of an electronic device precursor, the method comprising: (i) providing a silicon wafer (200) having a growth surface (205); (ii) forming (105) an insulative layer (210) on the growth surface (205) having a thickness of from 1 nm to 10 nm, preferably 2 nm to 1 nm; (iii) forming (110) a graphene monolayer or multi-layer structure (215) on the insulative layer (210); (iv) optionally forming (115, 120) one or more further layers (220) and/or electrical contacts (225, 230) on the graphene monolayer or multi-layer structure (215); (v) forming (125) a polymer coating (235) over the graphene monolayer or multi-layer structure (215) and any further layers (115) and/or electrical contacts (225, 230); (vi) thinning (130) the silicon wafer (200), or removing the silicon wafer (200) to provide an exposed surface of the insulative layer (210), by etching with an etchant, wherein the silicon wafer (200) is optionally subjected to a grinding step before etching; and (vii) optionally dissolving away (135) the polymer coating (235); wherein the insulative layer (210) and the polymer coating (235) are resistant to etching by the etchant. The resulting conductive graphene substrate can be used in (organic) LEDs, capacitor devices, tunnel FETs and Hall sensors.

公开(公告)号：US20240313056A1

公开(公告)日：2024-09-19

申请号：US18577827

申请日：2022-07-04

申请人： Paragraf Limited

发明人： Sebastian DIXON ,  Jaspreet KAINTH ,  Ivor GUINEY ,  Thomas James BADCOCK

IPC分类号： H01L29/16 ,  H01L21/02

CPC分类号： H01L29/1606 ,  H01L21/02376 ,  H01L21/02458 ,  H01L21/02483 ,  H01L21/02502 ,  H01L21/02527 ,  H01L21/0262

摘要： There is provided a graphene substrate comprising: a graphene layer structure directly on a metal oxide layer, said metal oxide layer directly on a support layer; wherein the metal oxide layer has a thickness of less than 5 nm and is selected from the group consisting of Al2O3, HfO2, MgO, MgAl2O4, Ta2O5, Y2O3, ZrO2 and YSZ; and wherein the support layer is BN, AlN, GaN, SiC, diamond, or a combination thereof.

公开(公告)号：US20240166521A1

公开(公告)日：2024-05-23

申请号：US18283770

申请日：2023-03-22

申请人： Paragraf Limited

发明人： Sebastian DIXON ,  Ivor GUINEY ,  Simon THOMAS ,  Ross Matthew GRIFFIN

IPC分类号： C01B32/186

CPC分类号： C01B32/186 ,  C01P2002/82 ,  C01P2004/04

摘要： A method of forming a graphene layer structure, the method comprising: providing a growth substrate having a growth surface; and forming a graphene layer structure on the growth surface by CVD; wherein the growth surface is formed of a material selected from the group consisting of: YSZ, MgAl2O4, YAIO3, CaF2 and LaF3.